xref: /freebsd/sys/contrib/device-tree/Bindings/pwm/imx-pwm.yaml (revision e1c4c8dd8d2d10b6104f06856a77bd5b4813a801) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX PWM controller
8
9maintainers:
10  - Philipp Zabel <p.zabel@pengutronix.de>
11
12allOf:
13  - $ref: pwm.yaml#
14
15properties:
16  "#pwm-cells":
17    description: |
18      Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml
19      in this directory for a description of the cells format.
20    enum:
21      - 2
22      - 3
23
24  compatible:
25    oneOf:
26      - enum:
27          - fsl,imx1-pwm
28          - fsl,imx27-pwm
29      - items:
30          - enum:
31              - fsl,imx25-pwm
32              - fsl,imx31-pwm
33              - fsl,imx50-pwm
34              - fsl,imx51-pwm
35              - fsl,imx53-pwm
36              - fsl,imx6q-pwm
37              - fsl,imx6sl-pwm
38              - fsl,imx6sll-pwm
39              - fsl,imx6sx-pwm
40              - fsl,imx6ul-pwm
41              - fsl,imx7d-pwm
42              - fsl,imx8mm-pwm
43              - fsl,imx8mn-pwm
44              - fsl,imx8mp-pwm
45              - fsl,imx8mq-pwm
46              - fsl,imx8qxp-pwm
47          - const: fsl,imx27-pwm
48
49  reg:
50    maxItems: 1
51
52  clocks:
53    items:
54      - description: SoC PWM ipg clock
55      - description: SoC PWM per clock
56
57  clock-names:
58    items:
59      - const: ipg
60      - const: per
61
62  interrupts:
63    maxItems: 1
64
65  power-domains:
66    maxItems: 1
67
68required:
69  - compatible
70  - reg
71  - clocks
72  - clock-names
73  - interrupts
74
75additionalProperties: false
76
77examples:
78  - |
79    #include <dt-bindings/clock/imx5-clock.h>
80
81    pwm@53fb4000 {
82        #pwm-cells = <3>;
83        compatible = "fsl,imx27-pwm";
84        reg = <0x53fb4000 0x4000>;
85        clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
86                 <&clks IMX5_CLK_PWM1_HF_GATE>;
87        clock-names = "ipg", "per";
88        interrupts = <61>;
89    };
90