1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pwm/imx-pwm.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale i.MX PWM controller 8 9maintainers: 10 - Philipp Zabel <p.zabel@pengutronix.de> 11 12allOf: 13 - $ref: pwm.yaml# 14 15properties: 16 "#pwm-cells": 17 description: | 18 Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml 19 in this directory for a description of the cells format. 20 enum: 21 - 2 22 - 3 23 24 compatible: 25 oneOf: 26 - enum: 27 - fsl,imx1-pwm 28 - fsl,imx27-pwm 29 - items: 30 - enum: 31 - fsl,imx25-pwm 32 - fsl,imx31-pwm 33 - fsl,imx50-pwm 34 - fsl,imx51-pwm 35 - fsl,imx53-pwm 36 - fsl,imx6q-pwm 37 - fsl,imx6sl-pwm 38 - fsl,imx6sll-pwm 39 - fsl,imx6sx-pwm 40 - fsl,imx6ul-pwm 41 - fsl,imx7d-pwm 42 - fsl,imx8mm-pwm 43 - fsl,imx8mn-pwm 44 - fsl,imx8mp-pwm 45 - fsl,imx8mq-pwm 46 - const: fsl,imx27-pwm 47 48 reg: 49 maxItems: 1 50 51 clocks: 52 items: 53 - description: SoC PWM ipg clock 54 - description: SoC PWM per clock 55 56 clock-names: 57 items: 58 - const: ipg 59 - const: per 60 61 interrupts: 62 maxItems: 1 63 64required: 65 - compatible 66 - reg 67 - clocks 68 - clock-names 69 - interrupts 70 71additionalProperties: false 72 73examples: 74 - | 75 #include <dt-bindings/clock/imx5-clock.h> 76 77 pwm@53fb4000 { 78 #pwm-cells = <3>; 79 compatible = "fsl,imx27-pwm"; 80 reg = <0x53fb4000 0x4000>; 81 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, 82 <&clks IMX5_CLK_PWM1_HF_GATE>; 83 clock-names = "ipg", "per"; 84 interrupts = <61>; 85 }; 86