1* Freescale MPIC timers 2 3Required properties: 4- compatible: "fsl,mpic-global-timer" 5 6- reg : Contains two regions. The first is the main timer register bank 7 (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx). The second is the timer control 8 register (TCRx) for the group. 9 10- fsl,available-ranges: use <start count> style section to define which 11 timer interrupts can be used. This property is optional; without this, 12 all timers within the group can be used. 13 14- interrupts: one interrupt per timer in the group, in order, starting 15 with timer zero. If timer-available-ranges is present, only the 16 interrupts that correspond to available timers shall be present. 17 18Example: 19 /* Note that this requires #interrupt-cells to be 4 */ 20 timer0: timer@41100 { 21 compatible = "fsl,mpic-global-timer"; 22 reg = <0x41100 0x100 0x41300 4>; 23 24 /* Another AMP partition is using timers 0 and 1 */ 25 fsl,available-ranges = <2 2>; 26 27 interrupts = <2 0 3 0 28 3 0 3 0>; 29 }; 30 31 timer1: timer@42100 { 32 compatible = "fsl,mpic-global-timer"; 33 reg = <0x42100 0x100 0x42300 4>; 34 interrupts = <4 0 3 0 35 5 0 3 0 36 6 0 3 0 37 7 0 3 0>; 38 }; 39