1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale i.MX General Power Controller v2 8 9maintainers: 10 - Andrey Smirnov <andrew.smirnov@gmail.com> 11 12description: | 13 The i.MX7S/D General Power Control (GPC) block contains Power Gating 14 Control (PGC) for various power domains. 15 16 Power domains contained within GPC node are generic power domain 17 providers, documented in 18 Documentation/devicetree/bindings/power/power-domain.yaml, which are 19 described as subnodes of the power gating controller 'pgc' node. 20 21 IP cores belonging to a power domain should contain a 'power-domains' 22 property that is a phandle for PGC node representing the domain. 23 24properties: 25 compatible: 26 enum: 27 - fsl,imx7d-gpc 28 - fsl,imx8mq-gpc 29 30 reg: 31 maxItems: 1 32 33 interrupts: 34 maxItems: 1 35 36 interrupt-controller: true 37 '#interrupt-cells': 38 const: 3 39 40 pgc: 41 type: object 42 description: list of power domains provided by this controller. 43 44 patternProperties: 45 "power-domain@[0-9]$": 46 type: object 47 properties: 48 49 '#power-domain-cells': 50 const: 0 51 52 reg: 53 description: | 54 Power domain index. Valid values are defined in 55 include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and 56 include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc 57 maxItems: 1 58 59 clocks: 60 description: | 61 A number of phandles to clocks that need to be enabled during domain 62 power-up sequencing to ensure reset propagation into devices located 63 inside this power domain. 64 minItems: 1 65 maxItems: 5 66 67 power-supply: true 68 69 required: 70 - '#power-domain-cells' 71 - reg 72 73required: 74 - compatible 75 - reg 76 - interrupts 77 - pgc 78 79additionalProperties: false 80 81examples: 82 - | 83 #include <dt-bindings/interrupt-controller/arm-gic.h> 84 85 gpc@303a0000 { 86 compatible = "fsl,imx7d-gpc"; 87 reg = <0x303a0000 0x1000>; 88 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 89 90 pgc { 91 #address-cells = <1>; 92 #size-cells = <0>; 93 94 pgc_mipi_phy: power-domain@0 { 95 #power-domain-cells = <0>; 96 reg = <0>; 97 power-supply = <®_1p0d>; 98 }; 99 100 pgc_pcie_phy: power-domain@1 { 101 #power-domain-cells = <0>; 102 reg = <1>; 103 power-supply = <®_1p0d>; 104 }; 105 106 pgc_hsic_phy: power-domain@2 { 107 #power-domain-cells = <0>; 108 reg = <2>; 109 power-supply = <®_1p2>; 110 }; 111 }; 112 }; 113