xref: /freebsd/sys/contrib/device-tree/Bindings/pinctrl/renesas,rza2-pinctrl.yaml (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*c66ec88fSEmmanuel Vadot%YAML 1.2
3*c66ec88fSEmmanuel Vadot---
4*c66ec88fSEmmanuel Vadot$id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml#
5*c66ec88fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*c66ec88fSEmmanuel Vadot
7*c66ec88fSEmmanuel Vadottitle: Renesas RZ/A2 combined Pin and GPIO controller
8*c66ec88fSEmmanuel Vadot
9*c66ec88fSEmmanuel Vadotmaintainers:
10*c66ec88fSEmmanuel Vadot  - Chris Brandt <chris.brandt@renesas.com>
11*c66ec88fSEmmanuel Vadot  - Geert Uytterhoeven <geert+renesas@glider.be>
12*c66ec88fSEmmanuel Vadot
13*c66ec88fSEmmanuel Vadotdescription:
14*c66ec88fSEmmanuel Vadot  The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO
15*c66ec88fSEmmanuel Vadot  controller.
16*c66ec88fSEmmanuel Vadot  Pin multiplexing and GPIO configuration is performed on a per-pin basis.
17*c66ec88fSEmmanuel Vadot  Each port features up to 8 pins, each of them configurable for GPIO function
18*c66ec88fSEmmanuel Vadot  (port mode) or in alternate function mode.
19*c66ec88fSEmmanuel Vadot  Up to 8 different alternate function modes exist for each single pin.
20*c66ec88fSEmmanuel Vadot
21*c66ec88fSEmmanuel Vadotproperties:
22*c66ec88fSEmmanuel Vadot  compatible:
23*c66ec88fSEmmanuel Vadot    const: "renesas,r7s9210-pinctrl" # RZ/A2M
24*c66ec88fSEmmanuel Vadot
25*c66ec88fSEmmanuel Vadot  reg:
26*c66ec88fSEmmanuel Vadot    maxItems: 1
27*c66ec88fSEmmanuel Vadot
28*c66ec88fSEmmanuel Vadot  gpio-controller: true
29*c66ec88fSEmmanuel Vadot
30*c66ec88fSEmmanuel Vadot  '#gpio-cells':
31*c66ec88fSEmmanuel Vadot    const: 2
32*c66ec88fSEmmanuel Vadot    description:
33*c66ec88fSEmmanuel Vadot      The first cell contains the global GPIO port index, constructed using the
34*c66ec88fSEmmanuel Vadot      RZA2_PIN() helper macro in r7s9210-pinctrl.h.
35*c66ec88fSEmmanuel Vadot      E.g. "RZA2_PIN(PORT6, 0)" for P6_0.
36*c66ec88fSEmmanuel Vadot
37*c66ec88fSEmmanuel Vadot  gpio-ranges:
38*c66ec88fSEmmanuel Vadot    maxItems: 1
39*c66ec88fSEmmanuel Vadot
40*c66ec88fSEmmanuel VadotpatternProperties:
41*c66ec88fSEmmanuel Vadot  "^.*$":
42*c66ec88fSEmmanuel Vadot    if:
43*c66ec88fSEmmanuel Vadot      type: object
44*c66ec88fSEmmanuel Vadot    then:
45*c66ec88fSEmmanuel Vadot      allOf:
46*c66ec88fSEmmanuel Vadot        - $ref: pincfg-node.yaml#
47*c66ec88fSEmmanuel Vadot        - $ref: pinmux-node.yaml#
48*c66ec88fSEmmanuel Vadot      description:
49*c66ec88fSEmmanuel Vadot        The child nodes of the pin controller designate pins to be used for
50*c66ec88fSEmmanuel Vadot        specific peripheral functions or as GPIO.
51*c66ec88fSEmmanuel Vadot
52*c66ec88fSEmmanuel Vadot        A pin multiplexing sub-node describes how to configure a set of
53*c66ec88fSEmmanuel Vadot        (or a single) pin in some desired alternate function mode.
54*c66ec88fSEmmanuel Vadot        The values for the pinmux properties are a combination of port name,
55*c66ec88fSEmmanuel Vadot        pin number and the desired function index. Use the RZA2_PINMUX macro
56*c66ec88fSEmmanuel Vadot        located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily
57*c66ec88fSEmmanuel Vadot        define these.
58*c66ec88fSEmmanuel Vadot        For assigning GPIO pins, use the macro RZA2_PIN also in
59*c66ec88fSEmmanuel Vadot        to express the desired port pin.
60*c66ec88fSEmmanuel Vadot
61*c66ec88fSEmmanuel Vadot      properties:
62*c66ec88fSEmmanuel Vadot        phandle: true
63*c66ec88fSEmmanuel Vadot
64*c66ec88fSEmmanuel Vadot        pinmux:
65*c66ec88fSEmmanuel Vadot          description:
66*c66ec88fSEmmanuel Vadot            Values are constructed from GPIO port number, pin number, and
67*c66ec88fSEmmanuel Vadot            alternate function configuration number using the RZA2_PINMUX()
68*c66ec88fSEmmanuel Vadot            helper macro in r7s9210-pinctrl.h.
69*c66ec88fSEmmanuel Vadot
70*c66ec88fSEmmanuel Vadot      required:
71*c66ec88fSEmmanuel Vadot        - pinmux
72*c66ec88fSEmmanuel Vadot
73*c66ec88fSEmmanuel Vadot      additionalProperties: false
74*c66ec88fSEmmanuel Vadot
75*c66ec88fSEmmanuel Vadotrequired:
76*c66ec88fSEmmanuel Vadot  - compatible
77*c66ec88fSEmmanuel Vadot  - reg
78*c66ec88fSEmmanuel Vadot  - gpio-controller
79*c66ec88fSEmmanuel Vadot  - '#gpio-cells'
80*c66ec88fSEmmanuel Vadot  - gpio-ranges
81*c66ec88fSEmmanuel Vadot
82*c66ec88fSEmmanuel VadotadditionalProperties: false
83*c66ec88fSEmmanuel Vadot
84*c66ec88fSEmmanuel Vadotexamples:
85*c66ec88fSEmmanuel Vadot  - |
86*c66ec88fSEmmanuel Vadot    #include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
87*c66ec88fSEmmanuel Vadot    pinctrl: pin-controller@fcffe000 {
88*c66ec88fSEmmanuel Vadot            compatible = "renesas,r7s9210-pinctrl";
89*c66ec88fSEmmanuel Vadot            reg = <0xfcffe000 0x1000>;
90*c66ec88fSEmmanuel Vadot
91*c66ec88fSEmmanuel Vadot            gpio-controller;
92*c66ec88fSEmmanuel Vadot            #gpio-cells = <2>;
93*c66ec88fSEmmanuel Vadot            gpio-ranges = <&pinctrl 0 0 176>;
94*c66ec88fSEmmanuel Vadot
95*c66ec88fSEmmanuel Vadot            /* Serial Console */
96*c66ec88fSEmmanuel Vadot            scif4_pins: serial4 {
97*c66ec88fSEmmanuel Vadot                    pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
98*c66ec88fSEmmanuel Vadot                             <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
99*c66ec88fSEmmanuel Vadot            };
100*c66ec88fSEmmanuel Vadot    };
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