xref: /freebsd/sys/contrib/device-tree/Bindings/pinctrl/qcom,sc7180-pinctrl.txt (revision fe75646a0234a261c0013bf1840fdac4acaf0cec)
1Qualcomm Technologies, Inc. SC7180 TLMM block
2
3This binding describes the Top Level Mode Multiplexer block found in the
4SC7180 platform.
5
6- compatible:
7	Usage: required
8	Value type: <string>
9	Definition: must be "qcom,sc7180-pinctrl"
10
11- reg:
12	Usage: required
13	Value type: <prop-encoded-array>
14	Definition: the base address and size of the north, south and west
15		    TLMM tiles
16
17- reg-names:
18	Usage: required
19	Value type: <prop-encoded-array>
20	Definition: names for the cells of reg, must contain "north", "south"
21		    and "west".
22
23- interrupts:
24	Usage: required
25	Value type: <prop-encoded-array>
26	Definition: should specify the TLMM summary IRQ.
27
28- interrupt-controller:
29	Usage: required
30	Value type: <none>
31	Definition: identifies this node as an interrupt controller
32
33- #interrupt-cells:
34	Usage: required
35	Value type: <u32>
36	Definition: must be 2. Specifying the pin number and flags, as defined
37		    in <dt-bindings/interrupt-controller/irq.h>
38
39- gpio-controller:
40	Usage: required
41	Value type: <none>
42	Definition: identifies this node as a gpio controller
43
44- #gpio-cells:
45	Usage: required
46	Value type: <u32>
47	Definition: must be 2. Specifying the pin number and flags, as defined
48		    in <dt-bindings/gpio/gpio.h>
49
50- gpio-ranges:
51	Usage: required
52	Value type: <prop-encoded-array>
53	Definition:  see ../gpio/gpio.txt
54
55- gpio-reserved-ranges:
56	Usage: optional
57	Value type: <prop-encoded-array>
58	Definition: see ../gpio/gpio.txt
59
60Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
61a general description of GPIO and interrupt bindings.
62
63Please refer to pinctrl-bindings.txt in this directory for details of the
64common pinctrl bindings used by client devices, including the meaning of the
65phrase "pin configuration node".
66
67The pin configuration nodes act as a container for an arbitrary number of
68subnodes. Each of these subnodes represents some desired configuration for a
69pin, a group, or a list of pins or groups. This configuration can include the
70mux function to select on those pin(s)/group(s), and various pin configuration
71parameters, such as pull-up, drive strength, etc.
72
73
74PIN CONFIGURATION NODES:
75
76The name of each subnode is not important; all subnodes should be enumerated
77and processed purely based on their content.
78
79Each subnode only affects those parameters that are explicitly listed. In
80other words, a subnode that lists a mux function but no pin configuration
81parameters implies no information about any pin configuration parameters.
82Similarly, a pin subnode that describes a pullup parameter implies no
83information about e.g. the mux function.
84
85
86The following generic properties as defined in pinctrl-bindings.txt are valid
87to specify in a pin configuration subnode:
88
89- pins:
90	Usage: required
91	Value type: <string-array>
92	Definition: List of gpio pins affected by the properties specified in
93		    this subnode.
94
95		    Valid pins are:
96		      gpio0-gpio118
97		        Supports mux, bias and drive-strength
98
99		      sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd,
100		      sdc2_data sdc1_rclk
101		        Supports bias and drive-strength
102
103		      ufs_reset
104			Supports bias and drive-strength
105
106- function:
107	Usage: required
108	Value type: <string>
109	Definition: Specify the alternative function to be configured for the
110		    specified pins. Functions are only valid for gpio pins.
111		    Valid values are:
112
113		    adsp_ext, agera_pll, aoss_cti, atest_char, atest_char0,
114		    atest_char1, atest_char2, atest_char3, atest_tsens,
115		    atest_tsens2, atest_usb1, atest_usb10, atest_usb11,
116		    atest_usb12, atest_usb13, atest_usb2, atest_usb20,
117		    atest_usb21, atest_usb22, atest_usb23, audio_ref,
118		    btfm_slimbus, cam_mclk, cci_async, cci_i2c, cci_timer0,
119		    cci_timer1, cci_timer2, cci_timer3, cci_timer4,
120		    cri_trng, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,
121		    ddr_pxi2, ddr_pxi3, dp_hot, edp_lcd, gcc_gp1, gcc_gp2,
122		    gcc_gp3, gpio, gp_pdm0, gp_pdm1, gp_pdm2, gps_tx,
123		    jitter_bist, ldo_en, ldo_update, lpass_ext, mdp_vsync,
124		    mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s_0,
125		    mi2s_1, mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag,
126		    PLL_BIST, pll_bypassnl, pll_reset, prng_rosc, qdss,
127		    qdss_cti, qlink_enable, qlink_request, qspi_clk, qspi_cs,
128		    qspi_data, qup00, qup01, qup02_i2c, qup02_uart, qup03,
129		    qup04_i2c, qup04_uart, qup05, qup10, qup11_i2c, qup11_uart,
130		    qup12, qup13_i2c, qup13_uart, qup14, qup15, sdc1_tb,
131		    sdc2_tb, sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2,
132		    tgu_ch3, tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt,
133		    usb_phy, vfr_1, _V_GPIO, _V_PPS_IN, _V_PPS_OUT,
134		    vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0,
135		    wlan2_adc1,
136
137- bias-disable:
138	Usage: optional
139	Value type: <none>
140	Definition: The specified pins should be configured as no pull.
141
142- bias-pull-down:
143	Usage: optional
144	Value type: <none>
145	Definition: The specified pins should be configured as pull down.
146
147- bias-pull-up:
148	Usage: optional
149	Value type: <none>
150	Definition: The specified pins should be configured as pull up.
151
152- output-high:
153	Usage: optional
154	Value type: <none>
155	Definition: The specified pins are configured in output mode, driven
156		    high.
157		    Not valid for sdc pins.
158
159- output-low:
160	Usage: optional
161	Value type: <none>
162	Definition: The specified pins are configured in output mode, driven
163		    low.
164		    Not valid for sdc pins.
165
166- drive-strength:
167	Usage: optional
168	Value type: <u32>
169	Definition: Selects the drive strength for the specified pins, in mA.
170		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
171
172Example:
173
174	tlmm: pinctrl@3500000 {
175		compatible = "qcom,sc7180-pinctrl";
176		reg = <0x3500000 0x300000>,
177		      <0x3900000 0x300000>,
178		      <0x3D00000 0x300000>;
179		reg-names = "west", "north", "south";
180		interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
181		gpio-controller;
182		#gpio-cells = <2>;
183		gpio-ranges = <&tlmm 0 0 119>;
184		gpio-reserved-ranges = <0 4>, <106 4>;
185		interrupt-controller;
186		#interrupt-cells = <2>;
187	};
188