1Qualcomm QCS404 TLMM block 2 3This binding describes the Top Level Mode Multiplexer block found in the 4QCS404 platform. 5 6- compatible: 7 Usage: required 8 Value type: <string> 9 Definition: must be "qcom,qcs404-pinctrl" 10 11- reg: 12 Usage: required 13 Value type: <prop-encoded-array> 14 Definition: the base address and size of the north, south and east TLMM 15 tiles. 16 17- reg-names: 18 Usage: required 19 Value type: <stringlist> 20 Defintiion: names for the cells of reg, must contain "north", "south" 21 and "east". 22 23- interrupts: 24 Usage: required 25 Value type: <prop-encoded-array> 26 Definition: should specify the TLMM summary IRQ. 27 28- interrupt-controller: 29 Usage: required 30 Value type: <none> 31 Definition: identifies this node as an interrupt controller 32 33- #interrupt-cells: 34 Usage: required 35 Value type: <u32> 36 Definition: must be 2. Specifying the pin number and flags, as defined 37 in <dt-bindings/interrupt-controller/irq.h> 38 39- gpio-controller: 40 Usage: required 41 Value type: <none> 42 Definition: identifies this node as a gpio controller 43 44- #gpio-cells: 45 Usage: required 46 Value type: <u32> 47 Definition: must be 2. Specifying the pin number and flags, as defined 48 in <dt-bindings/gpio/gpio.h> 49 50- gpio-ranges: 51 Usage: required 52 Definition: see ../gpio/gpio.txt 53 54Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for 55a general description of GPIO and interrupt bindings. 56 57Please refer to pinctrl-bindings.txt in this directory for details of the 58common pinctrl bindings used by client devices, including the meaning of the 59phrase "pin configuration node". 60 61The pin configuration nodes act as a container for an arbitrary number of 62subnodes. Each of these subnodes represents some desired configuration for a 63pin, a group, or a list of pins or groups. This configuration can include the 64mux function to select on those pin(s)/group(s), and various pin configuration 65parameters, such as pull-up, drive strength, etc. 66 67 68PIN CONFIGURATION NODES: 69 70The name of each subnode is not important; all subnodes should be enumerated 71and processed purely based on their content. 72 73Each subnode only affects those parameters that are explicitly listed. In 74other words, a subnode that lists a mux function but no pin configuration 75parameters implies no information about any pin configuration parameters. 76Similarly, a pin subnode that describes a pullup parameter implies no 77information about e.g. the mux function. 78 79 80The following generic properties as defined in pinctrl-bindings.txt are valid 81to specify in a pin configuration subnode: 82 83- pins: 84 Usage: required 85 Value type: <string-array> 86 Definition: List of gpio pins affected by the properties specified in 87 this subnode. 88 89 Valid pins are: 90 gpio0-gpio119 91 Supports mux, bias and drive-strength 92 93 sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, 94 sdc2_data 95 Supports bias and drive-strength 96 97 ufs_reset 98 Supports bias and drive-strength 99 100- function: 101 Usage: required 102 Value type: <string> 103 Definition: Specify the alternative function to be configured for the 104 specified pins. Functions are only valid for gpio pins. 105 Valid values are: 106 107 gpio, hdmi_tx, hdmi_ddc, blsp_uart_tx_a2, blsp_spi2, m_voc, 108 qdss_cti_trig_in_a0, blsp_uart_rx_a2, qdss_tracectl_a, 109 blsp_uart2, aud_cdc, blsp_i2c_sda_a2, qdss_tracedata_a, 110 blsp_i2c_scl_a2, qdss_tracectl_b, qdss_cti_trig_in_b0, 111 blsp_uart1, blsp_spi_mosi_a1, blsp_spi_miso_a1, 112 qdss_tracedata_b, blsp_i2c1, blsp_spi_cs_n_a1, gcc_plltest, 113 blsp_spi_clk_a1, rgb_data0, blsp_uart5, blsp_spi5, 114 adsp_ext, rgb_data1, prng_rosc, rgb_data2, blsp_i2c5, 115 gcc_gp1_clk_b, rgb_data3, gcc_gp2_clk_b, blsp_spi0, 116 blsp_uart0, gcc_gp3_clk_b, blsp_i2c0, qdss_traceclk_b, 117 pcie_clk, nfc_irq, blsp_spi4, nfc_dwl, audio_ts, rgb_data4, 118 spi_lcd, blsp_uart_tx_b2, gcc_gp3_clk_a, rgb_data5, 119 blsp_uart_rx_b2, blsp_i2c_sda_b2, blsp_i2c_scl_b2, 120 pwm_led11, i2s_3_data0_a, ebi2_lcd, i2s_3_data1_a, 121 i2s_3_data2_a, atest_char, pwm_led3, i2s_3_data3_a, 122 pwm_led4, i2s_4, ebi2_a, dsd_clk_b, pwm_led5, pwm_led6, 123 pwm_led7, pwm_led8, pwm_led24, spkr_dac0, blsp_i2c4, 124 pwm_led9, pwm_led10, spdifrx_opt, pwm_led12, pwm_led13, 125 pwm_led14, wlan1_adc1, rgb_data_b0, pwm_led15, 126 blsp_spi_mosi_b1, wlan1_adc0, rgb_data_b1, pwm_led16, 127 blsp_spi_miso_b1, qdss_cti_trig_out_b0, wlan2_adc1, 128 rgb_data_b2, pwm_led17, blsp_spi_cs_n_b1, wlan2_adc0, 129 rgb_data_b3, pwm_led18, blsp_spi_clk_b1, rgb_data_b4, 130 pwm_led19, ext_mclk1_b, qdss_traceclk_a, rgb_data_b5, 131 pwm_led20, atest_char3, i2s_3_sck_b, ldo_update, bimc_dte0, 132 rgb_hsync, pwm_led21, i2s_3_ws_b, dbg_out, rgb_vsync, 133 i2s_3_data0_b, ldo_en, hdmi_dtest, rgb_de, i2s_3_data1_b, 134 hdmi_lbk9, rgb_clk, atest_char1, i2s_3_data2_b, ebi_cdc, 135 hdmi_lbk8, rgb_mdp, atest_char0, i2s_3_data3_b, hdmi_lbk7, 136 rgb_data_b6, rgb_data_b7, hdmi_lbk6, rgmii_int, cri_trng1, 137 rgmii_wol, cri_trng0, gcc_tlmm, rgmii_ck, rgmii_tx, 138 hdmi_lbk5, hdmi_pixel, hdmi_rcv, hdmi_lbk4, rgmii_ctl, 139 ext_lpass, rgmii_rx, cri_trng, hdmi_lbk3, hdmi_lbk2, 140 qdss_cti_trig_out_b1, rgmii_mdio, hdmi_lbk1, rgmii_mdc, 141 hdmi_lbk0, ir_in, wsa_en, rgb_data6, rgb_data7, 142 atest_char2, ebi_ch0, blsp_uart3, blsp_spi3, sd_write, 143 blsp_i2c3, gcc_gp1_clk_a, qdss_cti_trig_in_b1, 144 gcc_gp2_clk_a, ext_mclk0, mclk_in1, i2s_1, dsd_clk_a, 145 qdss_cti_trig_in_a1, rgmi_dll1, pwm_led22, pwm_led23, 146 qdss_cti_trig_out_a0, rgmi_dll2, pwm_led1, 147 qdss_cti_trig_out_a1, pwm_led2, i2s_2, pll_bist, 148 ext_mclk1_a, mclk_in2, bimc_dte1, i2s_3_sck_a, i2s_3_ws_a 149 150- bias-disable: 151 Usage: optional 152 Value type: <none> 153 Definition: The specified pins should be configured as no pull. 154 155- bias-pull-down: 156 Usage: optional 157 Value type: <none> 158 Definition: The specified pins should be configured as pull down. 159 160- bias-pull-up: 161 Usage: optional 162 Value type: <none> 163 Definition: The specified pins should be configured as pull up. 164 165- output-high: 166 Usage: optional 167 Value type: <none> 168 Definition: The specified pins are configured in output mode, driven 169 high. 170 Not valid for sdc pins. 171 172- output-low: 173 Usage: optional 174 Value type: <none> 175 Definition: The specified pins are configured in output mode, driven 176 low. 177 Not valid for sdc pins. 178 179- drive-strength: 180 Usage: optional 181 Value type: <u32> 182 Definition: Selects the drive strength for the specified pins, in mA. 183 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16 184 185Example: 186 187 tlmm: pinctrl@1000000 { 188 compatible = "qcom,qcs404-pinctrl"; 189 reg = <0x01000000 0x200000>, 190 <0x01300000 0x200000>, 191 <0x07b00000 0x200000>; 192 reg-names = "south", "north", "east"; 193 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 194 gpio-controller; 195 #gpio-cells = <2>; 196 gpio-ranges = <&tlmm 0 0 120>; 197 interrupt-controller; 198 #interrupt-cells = <2>; 199 }; 200