xref: /freebsd/sys/contrib/device-tree/Bindings/pinctrl/qcom,pmic-mpp.txt (revision 77013d11e6483b970af25e13c9b892075742f7e5)
1Qualcomm PMIC Multi-Purpose Pin (MPP) block
2
3This binding describes the MPP block(s) found in the 8xxx series
4of PMIC's from Qualcomm.
5
6- compatible:
7	Usage: required
8	Value type: <string>
9	Definition: Should contain one of:
10		    "qcom,pm8018-mpp",
11		    "qcom,pm8019-mpp",
12		    "qcom,pm8038-mpp",
13		    "qcom,pm8058-mpp",
14		    "qcom,pm8821-mpp",
15		    "qcom,pm8841-mpp",
16		    "qcom,pm8916-mpp",
17		    "qcom,pm8917-mpp",
18		    "qcom,pm8921-mpp",
19		    "qcom,pm8941-mpp",
20		    "qcom,pm8950-mpp",
21		    "qcom,pmi8950-mpp",
22		    "qcom,pm8994-mpp",
23		    "qcom,pma8084-mpp",
24
25		    And must contain either "qcom,spmi-mpp" or "qcom,ssbi-mpp"
26		    if the device is on an spmi bus or an ssbi bus respectively.
27
28- reg:
29	Usage: required
30	Value type: <prop-encoded-array>
31	Definition: Register base of the MPP block and length.
32
33- interrupts:
34	Usage: required
35	Value type: <prop-encoded-array>
36	Definition: Must contain an array of encoded interrupt specifiers for
37		    each available MPP
38
39- gpio-controller:
40	Usage: required
41	Value type: <none>
42	Definition: Mark the device node as a GPIO controller
43
44- #gpio-cells:
45	Usage: required
46	Value type: <u32>
47	Definition: Must be 2;
48		    the first cell will be used to define MPP number and the
49		    second denotes the flags for this MPP
50
51Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
52a general description of GPIO and interrupt bindings.
53
54Please refer to pinctrl-bindings.txt in this directory for details of the
55common pinctrl bindings used by client devices, including the meaning of the
56phrase "pin configuration node".
57
58The pin configuration nodes act as a container for an arbitrary number of
59subnodes. Each of these subnodes represents some desired configuration for a
60pin or a list of pins. This configuration can include the
61mux function to select on those pin(s), and various pin configuration
62parameters, as listed below.
63
64SUBNODES:
65
66The name of each subnode is not important; all subnodes should be enumerated
67and processed purely based on their content.
68
69Each subnode only affects those parameters that are explicitly listed. In
70other words, a subnode that lists a mux function but no pin configuration
71parameters implies no information about any pin configuration parameters.
72Similarly, a pin subnode that describes a pullup parameter implies no
73information about e.g. the mux function.
74
75The following generic properties as defined in pinctrl-bindings.txt are valid
76to specify in a pin configuration subnode:
77
78- pins:
79	Usage: required
80	Value type: <string-array>
81	Definition: List of MPP pins affected by the properties specified in
82		    this subnode.  Valid pins are:
83		    mpp1-mpp4 for pm8841
84		    mpp1-mpp4 for pm8916
85		    mpp1-mpp8 for pm8941
86		    mpp1-mpp4 for pm8950
87		    mpp1-mpp4 for pmi8950
88		    mpp1-mpp4 for pma8084
89
90- function:
91	Usage: required
92	Value type: <string>
93	Definition: Specify the alternative function to be configured for the
94		    specified pins.  Valid values are:
95		    "digital",
96		    "analog",
97		    "sink"
98
99- bias-disable:
100	Usage: optional
101	Value type: <none>
102	Definition: The specified pins should be configured as no pull.
103
104- bias-pull-up:
105	Usage: optional
106	Value type: <u32>
107	Definition: The specified pins should be configured as pull up.
108		    Valid values are 600, 10000 and 30000 in bidirectional mode
109		    only, i.e. when operating in qcom,analog-mode and input and
110		    outputs are enabled. The hardware ignores the configuration
111		    when operating in other modes.
112
113- bias-high-impedance:
114	Usage: optional
115	Value type: <none>
116	Definition: The specified pins will put in high-Z mode and disabled.
117
118- input-enable:
119	Usage: optional
120	Value type: <none>
121	Definition: The specified pins are put in input mode, i.e. their input
122		    buffer is enabled
123
124- output-high:
125	Usage: optional
126	Value type: <none>
127	Definition: The specified pins are configured in output mode, driven
128		    high.
129
130- output-low:
131	Usage: optional
132	Value type: <none>
133	Definition: The specified pins are configured in output mode, driven
134		    low.
135
136- power-source:
137	Usage: optional
138	Value type: <u32>
139	Definition: Selects the power source for the specified pins. Valid power
140		    sources are defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
141
142- qcom,analog-level:
143	Usage: optional
144	Value type: <u32>
145	Definition: Selects the source for analog output. Valued values are
146		    defined in <dt-binding/pinctrl/qcom,pmic-mpp.h>
147		    PMIC_MPP_AOUT_LVL_*
148
149- qcom,dtest:
150	Usage: optional
151	Value type: <u32>
152	Definition: Selects which dtest rail to be routed in the various functions.
153		    Valid values are 1-4
154
155- qcom,amux-route:
156	Usage: optional
157	Value type: <u32>
158	Definition: Selects the source for analog input. Valid values are
159		    defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
160		    PMIC_MPP_AMUX_ROUTE_CH5, PMIC_MPP_AMUX_ROUTE_CH6...
161- qcom,paired:
162	Usage: optional
163	Value type: <none>
164	Definition: Indicates that the pin should be operating in paired mode.
165
166Example:
167
168	mpps@a000 {
169		compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp";
170		reg = <0xa000>;
171		gpio-controller;
172		#gpio-cells = <2>;
173		interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>;
174
175		pinctrl-names = "default";
176		pinctrl-0 = <&pm8841_default>;
177
178		pm8841_default: default {
179			gpio {
180				pins = "mpp1", "mpp2", "mpp3", "mpp4";
181				function = "digital";
182				input-enable;
183				power-source = <PM8841_MPP_S3>;
184			};
185		};
186	};
187