1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PMIC GPIO block 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 12description: 13 This binding describes the GPIO block(s) found in the 8xxx series of 14 PMIC's from Qualcomm. 15 16properties: 17 compatible: 18 items: 19 - enum: 20 - qcom,pm2250-gpio 21 - qcom,pm660-gpio 22 - qcom,pm660l-gpio 23 - qcom,pm6150-gpio 24 - qcom,pm6150l-gpio 25 - qcom,pm6350-gpio 26 - qcom,pm7325-gpio 27 - qcom,pm8005-gpio 28 - qcom,pm8008-gpio 29 - qcom,pm8018-gpio 30 - qcom,pm8019-gpio 31 - qcom,pm8038-gpio 32 - qcom,pm8058-gpio 33 - qcom,pm8150-gpio 34 - qcom,pm8150b-gpio 35 - qcom,pm8226-gpio 36 - qcom,pm8350-gpio 37 - qcom,pm8350b-gpio 38 - qcom,pm8350c-gpio 39 - qcom,pm8450-gpio 40 - qcom,pm8916-gpio 41 - qcom,pm8917-gpio 42 - qcom,pm8921-gpio 43 - qcom,pm8941-gpio 44 - qcom,pm8950-gpio 45 - qcom,pm8994-gpio 46 - qcom,pm8998-gpio 47 - qcom,pma8084-gpio 48 - qcom,pmi8950-gpio 49 - qcom,pmi8994-gpio 50 - qcom,pmi8998-gpio 51 - qcom,pmk8350-gpio 52 - qcom,pmr735a-gpio 53 - qcom,pmr735b-gpio 54 - qcom,pms405-gpio 55 - qcom,pmx55-gpio 56 57 - enum: 58 - qcom,spmi-gpio 59 - qcom,ssbi-gpio 60 61 reg: 62 maxItems: 1 63 64 interrupt-controller: true 65 66 '#interrupt-cells': 67 const: 2 68 69 gpio-controller: true 70 71 gpio-ranges: 72 maxItems: 1 73 74 '#gpio-cells': 75 const: 2 76 description: 77 The first cell will be used to define gpio number and the 78 second denotes the flags for this gpio 79 80additionalProperties: false 81 82required: 83 - compatible 84 - reg 85 - gpio-controller 86 - '#gpio-cells' 87 - gpio-ranges 88 - interrupt-controller 89 90patternProperties: 91 '-state$': 92 oneOf: 93 - $ref: "#/$defs/qcom-pmic-gpio-state" 94 - patternProperties: 95 ".*": 96 $ref: "#/$defs/qcom-pmic-gpio-state" 97 98$defs: 99 qcom-pmic-gpio-state: 100 type: object 101 allOf: 102 - $ref: "pinmux-node.yaml" 103 - $ref: "pincfg-node.yaml" 104 properties: 105 pins: 106 description: 107 List of gpio pins affected by the properties specified in 108 this subnode. Valid pins are 109 - gpio1-gpio10 for pm6150 110 - gpio1-gpio12 for pm6150l 111 - gpio1-gpio9 for pm6350 112 - gpio1-gpio10 for pm7325 113 - gpio1-gpio4 for pm8005 114 - gpio1-gpio2 for pm8008 115 - gpio1-gpio6 for pm8018 116 - gpio1-gpio12 for pm8038 117 - gpio1-gpio40 for pm8058 118 - gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, 119 gpio7 and gpio8) 120 - gpio1-gpio12 for pm8150b (holes on gpio3, gpio4 121 and gpio7) 122 - gpio1-gpio12 for pm8150l (hole on gpio7) 123 - gpio1-gpio4 for pm8916 124 - gpio1-gpio10 for pm8350 125 - gpio1-gpio8 for pm8350b 126 - gpio1-gpio9 for pm8350c 127 - gpio1-gpio38 for pm8917 128 - gpio1-gpio44 for pm8921 129 - gpio1-gpio36 for pm8941 130 - gpio1-gpio8 for pm8950 (hole on gpio3) 131 - gpio1-gpio22 for pm8994 132 - gpio1-gpio26 for pm8998 133 - gpio1-gpio22 for pma8084 134 - gpio1-gpio2 for pmi8950 135 - gpio1-gpio10 for pmi8994 136 - gpio1-gpio4 for pmk8350 137 - gpio1-gpio4 for pmr735a 138 - gpio1-gpio4 for pmr735b 139 - gpio1-gpio12 for pms405 (holes on gpio1, gpio9 140 and gpio10) 141 - gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10 142 and gpio11) 143 144 items: 145 pattern: "^gpio([0-9]+)$" 146 147 function: 148 items: 149 - enum: 150 - normal 151 - paired 152 - func1 153 - func2 154 - dtest1 155 - dtest2 156 - dtest3 157 - dtest4 158 - func3 # supported by LV/MV GPIO subtypes 159 - func4 # supported by LV/MV GPIO subtypes 160 161 bias-disable: true 162 bias-pull-down: true 163 bias-pull-up: true 164 165 qcom,pull-up-strength: 166 $ref: /schemas/types.yaml#/definitions/uint32 167 description: 168 Specifies the strength to use for pull up, if selected. 169 Valid values are defined in 170 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 171 If this property is omitted 30uA strength will be used 172 if pull up is selected 173 enum: [0, 1, 2, 3] 174 175 bias-high-impedance: true 176 input-enable: true 177 output-high: true 178 output-low: true 179 output-enable: true 180 output-disable: true 181 power-source: true 182 183 qcom,drive-strength: 184 $ref: /schemas/types.yaml#/definitions/uint32 185 description: 186 Selects the drive strength for the specified pins 187 Valid drive strength values are defined in 188 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 189 enum: [0, 1, 2, 3] 190 191 drive-push-pull: true 192 drive-open-drain: true 193 drive-open-source: true 194 195 qcom,analog-pass: 196 $ref: /schemas/types.yaml#/definitions/flag 197 description: 198 The specified pins are configured in 199 analog-pass-through mode. 200 201 qcom,atest: 202 $ref: /schemas/types.yaml#/definitions/uint32 203 description: 204 Selects ATEST rail to route to GPIO when it's 205 configured in analog-pass-through mode. 206 enum: [1, 2, 3, 4] 207 208 qcom,dtest-buffer: 209 $ref: /schemas/types.yaml#/definitions/uint32 210 description: 211 Selects DTEST rail to route to GPIO when it's 212 configured as digital input. 213 enum: [1, 2, 3, 4] 214 215 required: 216 - pins 217 - function 218 219 additionalProperties: false 220 221examples: 222 - | 223 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 224 225 pm8921_gpio: gpio@150 { 226 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio"; 227 reg = <0x150 0x160>; 228 interrupt-controller; 229 #interrupt-cells = <2>; 230 gpio-controller; 231 gpio-ranges = <&pm8921_gpio 0 0 44>; 232 #gpio-cells = <2>; 233 234 pm8921_gpio_keys: gpio-keys-state { 235 volume-keys { 236 pins = "gpio20", "gpio21"; 237 function = "normal"; 238 239 input-enable; 240 bias-pull-up; 241 drive-push-pull; 242 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 243 power-source = <PM8921_GPIO_S4>; 244 }; 245 }; 246 }; 247... 248