1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PMIC GPIO block 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 12description: 13 This binding describes the GPIO block(s) found in the 8xxx series of 14 PMIC's from Qualcomm. 15 16properties: 17 compatible: 18 items: 19 - enum: 20 - qcom,pm660-gpio 21 - qcom,pm660l-gpio 22 - qcom,pm6150-gpio 23 - qcom,pm6150l-gpio 24 - qcom,pm6350-gpio 25 - qcom,pm7325-gpio 26 - qcom,pm8005-gpio 27 - qcom,pm8008-gpio 28 - qcom,pm8018-gpio 29 - qcom,pm8038-gpio 30 - qcom,pm8058-gpio 31 - qcom,pm8150-gpio 32 - qcom,pm8150b-gpio 33 - qcom,pm8350-gpio 34 - qcom,pm8350b-gpio 35 - qcom,pm8350c-gpio 36 - qcom,pm8916-gpio 37 - qcom,pm8917-gpio 38 - qcom,pm8921-gpio 39 - qcom,pm8941-gpio 40 - qcom,pm8950-gpio 41 - qcom,pm8994-gpio 42 - qcom,pm8998-gpio 43 - qcom,pma8084-gpio 44 - qcom,pmi8950-gpio 45 - qcom,pmi8994-gpio 46 - qcom,pmi8998-gpio 47 - qcom,pmk8350-gpio 48 - qcom,pmr735a-gpio 49 - qcom,pmr735b-gpio 50 - qcom,pms405-gpio 51 - qcom,pmx55-gpio 52 53 - enum: 54 - qcom,spmi-gpio 55 - qcom,ssbi-gpio 56 57 reg: 58 maxItems: 1 59 60 interrupt-controller: true 61 62 '#interrupt-cells': 63 const: 2 64 65 gpio-controller: true 66 67 gpio-ranges: 68 maxItems: 1 69 70 '#gpio-cells': 71 const: 2 72 description: 73 The first cell will be used to define gpio number and the 74 second denotes the flags for this gpio 75 76additionalProperties: false 77 78required: 79 - compatible 80 - reg 81 - gpio-controller 82 - '#gpio-cells' 83 - gpio-ranges 84 - interrupt-controller 85 86patternProperties: 87 '-state$': 88 oneOf: 89 - $ref: "#/$defs/qcom-pmic-gpio-state" 90 - patternProperties: 91 ".*": 92 $ref: "#/$defs/qcom-pmic-gpio-state" 93 94$defs: 95 qcom-pmic-gpio-state: 96 type: object 97 allOf: 98 - $ref: "pinmux-node.yaml" 99 - $ref: "pincfg-node.yaml" 100 properties: 101 pins: 102 description: 103 List of gpio pins affected by the properties specified in 104 this subnode. Valid pins are 105 - gpio1-gpio10 for pm6150 106 - gpio1-gpio12 for pm6150l 107 - gpio1-gpio9 for pm6350 108 - gpio1-gpio10 for pm7325 109 - gpio1-gpio4 for pm8005 110 - gpio1-gpio2 for pm8008 111 - gpio1-gpio6 for pm8018 112 - gpio1-gpio12 for pm8038 113 - gpio1-gpio40 for pm8058 114 - gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, 115 gpio7 and gpio8) 116 - gpio1-gpio12 for pm8150b (holes on gpio3, gpio4 117 and gpio7) 118 - gpio1-gpio12 for pm8150l (hole on gpio7) 119 - gpio1-gpio4 for pm8916 120 - gpio1-gpio10 for pm8350 121 - gpio1-gpio8 for pm8350b 122 - gpio1-gpio9 for pm8350c 123 - gpio1-gpio38 for pm8917 124 - gpio1-gpio44 for pm8921 125 - gpio1-gpio36 for pm8941 126 - gpio1-gpio8 for pm8950 (hole on gpio3) 127 - gpio1-gpio22 for pm8994 128 - gpio1-gpio26 for pm8998 129 - gpio1-gpio22 for pma8084 130 - gpio1-gpio2 for pmi8950 131 - gpio1-gpio10 for pmi8994 132 - gpio1-gpio4 for pmk8350 133 - gpio1-gpio4 for pmr735a 134 - gpio1-gpio4 for pmr735b 135 - gpio1-gpio12 for pms405 (holes on gpio1, gpio9 136 and gpio10) 137 - gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10 138 and gpio11) 139 140 items: 141 pattern: "^gpio([0-9]+)$" 142 143 function: 144 items: 145 - enum: 146 - normal 147 - paired 148 - func1 149 - func2 150 - dtest1 151 - dtest2 152 - dtest3 153 - dtest4 154 - func3 # supported by LV/MV GPIO subtypes 155 - func4 # supported by LV/MV GPIO subtypes 156 157 bias-disable: true 158 bias-pull-down: true 159 bias-pull-up: true 160 161 qcom,pull-up-strength: 162 $ref: /schemas/types.yaml#/definitions/uint32 163 description: 164 Specifies the strength to use for pull up, if selected. 165 Valid values are defined in 166 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 167 If this property is omitted 30uA strength will be used 168 if pull up is selected 169 enum: [0, 1, 2, 3] 170 171 bias-high-impedance: true 172 input-enable: true 173 output-high: true 174 output-low: true 175 output-enable: true 176 output-disable: true 177 power-source: true 178 179 qcom,drive-strength: 180 $ref: /schemas/types.yaml#/definitions/uint32 181 description: 182 Selects the drive strength for the specified pins 183 Valid drive strength values are defined in 184 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 185 enum: [0, 1, 2, 3] 186 187 drive-push-pull: true 188 drive-open-drain: true 189 drive-open-source: true 190 191 qcom,analog-pass: 192 $ref: /schemas/types.yaml#/definitions/flag 193 description: 194 The specified pins are configured in 195 analog-pass-through mode. 196 197 qcom,atest: 198 $ref: /schemas/types.yaml#/definitions/uint32 199 description: 200 Selects ATEST rail to route to GPIO when it's 201 configured in analog-pass-through mode. 202 enum: [1, 2, 3, 4] 203 204 qcom,dtest-buffer: 205 $ref: /schemas/types.yaml#/definitions/uint32 206 description: 207 Selects DTEST rail to route to GPIO when it's 208 configured as digital input. 209 enum: [1, 2, 3, 4] 210 211 required: 212 - pins 213 - function 214 215 additionalProperties: false 216 217examples: 218 - | 219 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 220 221 pm8921_gpio: gpio@150 { 222 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio"; 223 reg = <0x150 0x160>; 224 interrupt-controller; 225 #interrupt-cells = <2>; 226 gpio-controller; 227 gpio-ranges = <&pm8921_gpio 0 0 44>; 228 #gpio-cells = <2>; 229 230 pm8921_gpio_keys: gpio-keys-state { 231 volume-keys { 232 pins = "gpio20", "gpio21"; 233 function = "normal"; 234 235 input-enable; 236 bias-pull-up; 237 drive-push-pull; 238 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 239 power-source = <PM8921_GPIO_S4>; 240 }; 241 }; 242 }; 243... 244