1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8953-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Technologies, Inc. MSM8953 TLMM block 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 12description: 13 Top Level Mode Multiplexer pin controller in Qualcomm MSM8953 SoC. 14 15properties: 16 compatible: 17 const: qcom,msm8953-pinctrl 18 19 reg: 20 maxItems: 1 21 22 interrupts: 23 maxItems: 1 24 25 interrupt-controller: true 26 "#interrupt-cells": true 27 gpio-controller: true 28 gpio-reserved-ranges: true 29 "#gpio-cells": true 30 gpio-ranges: true 31 32patternProperties: 33 "-state$": 34 oneOf: 35 - $ref: "#/$defs/qcom-msm8953-tlmm-state" 36 - patternProperties: 37 "-pins$": 38 $ref: "#/$defs/qcom-msm8953-tlmm-state" 39 additionalProperties: false 40 41$defs: 42 qcom-msm8953-tlmm-state: 43 type: object 44 description: 45 Pinctrl node's client devices use subnodes for desired pin configuration. 46 Client device subnodes use below standard properties. 47 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state 48 unevaluatedProperties: false 49 50 properties: 51 pins: 52 description: 53 List of gpio pins affected by the properties specified in this 54 subnode. 55 items: 56 oneOf: 57 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[01])$" 58 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk, 59 sdc2_cmd, sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, 60 qdsd_data1, qdsd_data2, qdsd_data3 ] 61 minItems: 1 62 maxItems: 16 63 64 function: 65 description: 66 Specify the alternative function to be configured for the specified 67 pins. 68 69 enum: [ accel_int, adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, 70 atest_char, atest_char0, atest_char1, atest_char2, atest_char3, 71 atest_gpsadc_dtest0_native, atest_gpsadc_dtest1_native, atest_tsens, 72 atest_wlan0, atest_wlan1, bimc_dte0, bimc_dte1, blsp1_spi, 73 blsp3_spi, blsp6_spi, blsp7_spi, blsp_i2c1, blsp_i2c2, blsp_i2c3, 74 blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_spi1, 75 blsp_spi2, blsp_spi3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7, 76 blsp_spi8, blsp_uart2, blsp_uart4, blsp_uart5, blsp_uart6, cam0_ldo, 77 cam1_ldo, cam1_rst, cam1_standby, cam2_rst, cam2_standby, cam3_rst, 78 cam3_standby, cam_irq, cam_mclk, cap_int, cci_async, cci_i2c, 79 cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4, 80 cdc_pdm0, codec_int1, codec_int2, codec_reset, cri_trng, cri_trng0, 81 cri_trng1, dac_calib0, dac_calib1, dac_calib10, dac_calib11, 82 dac_calib12, dac_calib13, dac_calib14, dac_calib15, dac_calib16, 83 dac_calib17, dac_calib18, dac_calib19, dac_calib2, dac_calib20, 84 dac_calib21, dac_calib22, dac_calib23, dac_calib24, dac_calib25, 85 dac_calib3, dac_calib4, dac_calib5, dac_calib6, dac_calib7, 86 dac_calib8, dac_calib9, dbg_out, ddr_bist, dmic0_clk, dmic0_data, 87 ebi_cdc, ebi_ch0, ext_lpass, flash_strobe, fp_int, gcc_gp1_clk_a, 88 gcc_gp1_clk_b, gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a, 89 gcc_gp3_clk_b, gcc_plltest, gcc_tlmm, gpio, gsm0_tx, gsm1_tx, 90 gyro_int, hall_int, hdmi_int, key_focus, key_home, key_snapshot, 91 key_volp, ldo_en, ldo_update, lpass_slimbus, lpass_slimbus0, 92 lpass_slimbus1, m_voc, mag_int, mdp_vsync, mipi_dsi0, modem_tsync, 93 mss_lte, nav_pps, nav_pps_in_a, nav_pps_in_b, nav_tsync, 94 nfc_disable, nfc_dwl, nfc_irq, ois_sync, pa_indicator, pbs0, pbs1, 95 pbs2, pressure_int, pri_mi2s, pri_mi2s_mclk_a, pri_mi2s_mclk_b, 96 pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b, 97 pwr_down, pwr_modem_enabled_a, pwr_modem_enabled_b, 98 pwr_nav_enabled_a, pwr_nav_enabled_b, qdss_cti_trig_in_a0, 99 qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, 100 qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, 101 qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_traceclk_b, 102 qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a, 103 qdss_tracedata_b, sd_write, sdcard_det, sec_mi2s, sec_mi2s_mclk_a, 104 sec_mi2s_mclk_b, smb_int, ss_switch, ssbi_wtr1, ts_resout, 105 ts_sample, ts_xvdd, tsens_max, uim1_clk, uim1_data, uim1_present, 106 uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset, 107 uim_batt, us_emitter, us_euro, wcss_bt, wcss_fm, wcss_wlan, 108 wcss_wlan0, wcss_wlan1, wcss_wlan2, wsa_en, wsa_io, wsa_irq ] 109 110 required: 111 - pins 112 113allOf: 114 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 115 116required: 117 - compatible 118 - reg 119 120additionalProperties: false 121 122examples: 123 - | 124 #include <dt-bindings/interrupt-controller/arm-gic.h> 125 tlmm: pinctrl@1000000 { 126 compatible = "qcom,msm8953-pinctrl"; 127 reg = <0x01000000 0x300000>; 128 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 129 interrupt-controller; 130 #interrupt-cells = <2>; 131 gpio-controller; 132 #gpio-cells = <2>; 133 gpio-ranges = <&tlmm 0 0 142>; 134 135 serial_default: serial-state { 136 pins = "gpio4", "gpio5"; 137 function = "blsp_uart2"; 138 drive-strength = <2>; 139 bias-disable; 140 }; 141 }; 142