1Qualcomm MSM8916 TLMM block 2 3This binding describes the Top Level Mode Multiplexer block found in the 4MSM8916 platform. 5 6- compatible: 7 Usage: required 8 Value type: <string> 9 Definition: must be "qcom,msm8916-pinctrl" 10 11- reg: 12 Usage: required 13 Value type: <prop-encoded-array> 14 Definition: the base address and size of the TLMM register space. 15 16- interrupts: 17 Usage: required 18 Value type: <prop-encoded-array> 19 Definition: should specify the TLMM summary IRQ. 20 21- interrupt-controller: 22 Usage: required 23 Value type: <none> 24 Definition: identifies this node as an interrupt controller 25 26- #interrupt-cells: 27 Usage: required 28 Value type: <u32> 29 Definition: must be 2. Specifying the pin number and flags, as defined 30 in <dt-bindings/interrupt-controller/irq.h> 31 32- gpio-controller: 33 Usage: required 34 Value type: <none> 35 Definition: identifies this node as a gpio controller 36 37- #gpio-cells: 38 Usage: required 39 Value type: <u32> 40 Definition: must be 2. Specifying the pin number and flags, as defined 41 in <dt-bindings/gpio/gpio.h> 42 43- gpio-ranges: 44 Usage: required 45 Definition: see ../gpio/gpio.txt 46 47- gpio-reserved-ranges: 48 Usage: optional 49 Definition: see ../gpio/gpio.txt 50 51Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for 52a general description of GPIO and interrupt bindings. 53 54Please refer to pinctrl-bindings.txt in this directory for details of the 55common pinctrl bindings used by client devices, including the meaning of the 56phrase "pin configuration node". 57 58The pin configuration nodes act as a container for an arbitrary number of 59subnodes. Each of these subnodes represents some desired configuration for a 60pin, a group, or a list of pins or groups. This configuration can include the 61mux function to select on those pin(s)/group(s), and various pin configuration 62parameters, such as pull-up, drive strength, etc. 63 64 65PIN CONFIGURATION NODES: 66 67The name of each subnode is not important; all subnodes should be enumerated 68and processed purely based on their content. 69 70Each subnode only affects those parameters that are explicitly listed. In 71other words, a subnode that lists a mux function but no pin configuration 72parameters implies no information about any pin configuration parameters. 73Similarly, a pin subnode that describes a pullup parameter implies no 74information about e.g. the mux function. 75 76 77The following generic properties as defined in pinctrl-bindings.txt are valid 78to specify in a pin configuration subnode: 79 80- pins: 81 Usage: required 82 Value type: <string-array> 83 Definition: List of gpio pins affected by the properties specified in 84 this subnode. Valid pins are: 85 gpio0-gpio121, 86 sdc1_clk, 87 sdc1_cmd, 88 sdc1_data 89 sdc2_clk, 90 sdc2_cmd, 91 sdc2_data, 92 qdsd_cmd, 93 qdsd_data0, 94 qdsd_data1, 95 qdsd_data2, 96 qdsd_data3 97 98- function: 99 Usage: required 100 Value type: <string> 101 Definition: Specify the alternative function to be configured for the 102 specified pins. Functions are only valid for gpio pins. 103 Valid values are: 104 adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char, atest_char0, 105 atest_char1, atest_char2, atest_char3, atest_combodac, atest_gpsadc0, 106 atest_gpsadc1, atest_tsens, atest_wlan0, atest_wlan1, backlight_en, 107 bimc_dte0,bimc_dte1, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, 108 blsp_i2c5, blsp_i2c6, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2, 109 blsp_spi1_cs3, blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2, blsp_spi2_cs3, 110 blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2, blsp_spi3_cs3, blsp_spi4, 111 blsp_spi5, blsp_spi6, blsp_uart1, blsp_uart2, blsp_uim1, blsp_uim2, 112 cam1_rst, cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, 113 cci_timer0, cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, 114 display_5v, dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, 115 ext_lpass, flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a, 116 gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0, gsm0_tx1, 117 gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2, ldo_en, 118 ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc, nav_pps, nav_tsync, 119 pa_indicator, pbs0, pbs1, pbs2, pri_mi2s, pri_mi2s_ws, prng_rosc, 120 pwr_crypto_enabled_a, pwr_crypto_enabled_b, pwr_modem_enabled_a, 121 pwr_modem_enabled_b, pwr_nav_enabled_a, pwr_nav_enabled_b, 122 qdss_ctitrig_in_a0, qdss_ctitrig_in_a1, qdss_ctitrig_in_b0, 123 qdss_ctitrig_in_b1, qdss_ctitrig_out_a0, qdss_ctitrig_out_a1, 124 qdss_ctitrig_out_b0, qdss_ctitrig_out_b1, qdss_traceclk_a, 125 qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a, 126 qdss_tracedata_b, reset_n, sd_card, sd_write, sec_mi2s, smb_int, 127 ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3, uim_batt, wcss_bt, wcss_fm, 128 wcss_wlan, webcam1_rst 129 130- bias-disable: 131 Usage: optional 132 Value type: <none> 133 Definition: The specified pins should be configured as no pull. 134 135- bias-pull-down: 136 Usage: optional 137 Value type: <none> 138 Definition: The specified pins should be configured as pull down. 139 140- bias-pull-up: 141 Usage: optional 142 Value type: <none> 143 Definition: The specified pins should be configured as pull up. 144 145- output-high: 146 Usage: optional 147 Value type: <none> 148 Definition: The specified pins are configured in output mode, driven 149 high. 150 Not valid for sdc pins. 151 152- output-low: 153 Usage: optional 154 Value type: <none> 155 Definition: The specified pins are configured in output mode, driven 156 low. 157 Not valid for sdc pins. 158 159- drive-strength: 160 Usage: optional 161 Value type: <u32> 162 Definition: Selects the drive strength for the specified pins, in mA. 163 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16 164 165Example: 166 167 tlmm: pinctrl@1000000 { 168 compatible = "qcom,msm8916-pinctrl"; 169 reg = <0x1000000 0x300000>; 170 interrupts = <0 208 0>; 171 gpio-controller; 172 #gpio-cells = <2>; 173 gpio-ranges = <&tlmm 0 0 122>; 174 interrupt-controller; 175 #interrupt-cells = <2>; 176 177 uart2: uart2-default { 178 mux { 179 pins = "gpio4", "gpio5"; 180 function = "blsp_uart2"; 181 }; 182 183 tx { 184 pins = "gpio4"; 185 drive-strength = <4>; 186 bias-disable; 187 }; 188 189 rx { 190 pins = "gpio5"; 191 drive-strength = <2>; 192 bias-pull-up; 193 }; 194 }; 195 }; 196