1*c66ec88fSEmmanuel VadotQualcomm IPQ8064 TLMM block 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible: "qcom,ipq8064-pinctrl" 5*c66ec88fSEmmanuel Vadot- reg: Should be the base address and length of the TLMM block. 6*c66ec88fSEmmanuel Vadot- interrupts: Should be the parent IRQ of the TLMM block. 7*c66ec88fSEmmanuel Vadot- interrupt-controller: Marks the device node as an interrupt controller. 8*c66ec88fSEmmanuel Vadot- #interrupt-cells: Should be two. 9*c66ec88fSEmmanuel Vadot- gpio-controller: Marks the device node as a GPIO controller. 10*c66ec88fSEmmanuel Vadot- #gpio-cells : Should be two. 11*c66ec88fSEmmanuel Vadot The first cell is the gpio pin number and the 12*c66ec88fSEmmanuel Vadot second cell is used for optional parameters. 13*c66ec88fSEmmanuel Vadot- gpio-ranges: see ../gpio/gpio.txt 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel VadotOptional properties: 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel Vadot- gpio-reserved-ranges: see ../gpio/gpio.txt 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel VadotPlease refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for 20*c66ec88fSEmmanuel Vadota general description of GPIO and interrupt bindings. 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel VadotPlease refer to pinctrl-bindings.txt in this directory for details of the 23*c66ec88fSEmmanuel Vadotcommon pinctrl bindings used by client devices, including the meaning of the 24*c66ec88fSEmmanuel Vadotphrase "pin configuration node". 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel VadotQualcomm's pin configuration nodes act as a container for an arbitrary number of 27*c66ec88fSEmmanuel Vadotsubnodes. Each of these subnodes represents some desired configuration for a 28*c66ec88fSEmmanuel Vadotpin, a group, or a list of pins or groups. This configuration can include the 29*c66ec88fSEmmanuel Vadotmux function to select on those pin(s)/group(s), and various pin configuration 30*c66ec88fSEmmanuel Vadotparameters, such as pull-up, drive strength, etc. 31*c66ec88fSEmmanuel Vadot 32*c66ec88fSEmmanuel VadotThe name of each subnode is not important; all subnodes should be enumerated 33*c66ec88fSEmmanuel Vadotand processed purely based on their content. 34*c66ec88fSEmmanuel Vadot 35*c66ec88fSEmmanuel VadotEach subnode only affects those parameters that are explicitly listed. In 36*c66ec88fSEmmanuel Vadotother words, a subnode that lists a mux function but no pin configuration 37*c66ec88fSEmmanuel Vadotparameters implies no information about any pin configuration parameters. 38*c66ec88fSEmmanuel VadotSimilarly, a pin subnode that describes a pullup parameter implies no 39*c66ec88fSEmmanuel Vadotinformation about e.g. the mux function. 40*c66ec88fSEmmanuel Vadot 41*c66ec88fSEmmanuel Vadot 42*c66ec88fSEmmanuel VadotThe following generic properties as defined in pinctrl-bindings.txt are valid 43*c66ec88fSEmmanuel Vadotto specify in a pin configuration subnode: 44*c66ec88fSEmmanuel Vadot 45*c66ec88fSEmmanuel Vadot pins, function, bias-disable, bias-pull-down, bias-pull-up, drive-strength, 46*c66ec88fSEmmanuel Vadot output-low, output-high. 47*c66ec88fSEmmanuel Vadot 48*c66ec88fSEmmanuel VadotNon-empty subnodes must specify the 'pins' property. 49*c66ec88fSEmmanuel Vadot 50*c66ec88fSEmmanuel VadotValid values for qcom,pins are: 51*c66ec88fSEmmanuel Vadot gpio0-gpio68 52*c66ec88fSEmmanuel Vadot Supports mux, bias, and drive-strength 53*c66ec88fSEmmanuel Vadot 54*c66ec88fSEmmanuel Vadot sdc3_clk, sdc3_cmd, sdc3_data 55*c66ec88fSEmmanuel Vadot Supports bias and drive-strength 56*c66ec88fSEmmanuel Vadot 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel VadotValid values for function are: 59*c66ec88fSEmmanuel Vadot mdio, mi2s, pdm, ssbi, spmi, audio_pcm, gpio, gsbi1, gsbi2, gsbi4, gsbi5, 60*c66ec88fSEmmanuel Vadot gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3, gsbi6, gsbi7, nss_spi, sdc1, 61*c66ec88fSEmmanuel Vadot spdif, nand, tsif1, tsif2, usb_fs_n, usb_fs, usb2_hsic, rgmii2, sata, 62*c66ec88fSEmmanuel Vadot pcie1_rst, pcie1_prsnt, pcie1_pwren_n, pcie1_pwren, pcie1_pwrflt, 63*c66ec88fSEmmanuel Vadot pcie1_clk_req, pcie2_rst, pcie2_prsnt, pcie2_pwren_n, pcie2_pwren, 64*c66ec88fSEmmanuel Vadot pcie2_pwrflt, pcie2_clk_req, pcie3_rst, pcie3_prsnt, pcie3_pwren_n, 65*c66ec88fSEmmanuel Vadot pcie3_pwren, pcie3_pwrflt, pcie3_clk_req, ps_hold 66*c66ec88fSEmmanuel Vadot 67*c66ec88fSEmmanuel VadotExample: 68*c66ec88fSEmmanuel Vadot 69*c66ec88fSEmmanuel Vadot pinmux: pinctrl@800000 { 70*c66ec88fSEmmanuel Vadot compatible = "qcom,ipq8064-pinctrl"; 71*c66ec88fSEmmanuel Vadot reg = <0x800000 0x4000>; 72*c66ec88fSEmmanuel Vadot 73*c66ec88fSEmmanuel Vadot gpio-controller; 74*c66ec88fSEmmanuel Vadot #gpio-cells = <2>; 75*c66ec88fSEmmanuel Vadot gpio-ranges = <&pinmux 0 0 69>; 76*c66ec88fSEmmanuel Vadot interrupt-controller; 77*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 78*c66ec88fSEmmanuel Vadot interrupts = <0 32 0x4>; 79*c66ec88fSEmmanuel Vadot 80*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 81*c66ec88fSEmmanuel Vadot pinctrl-0 = <&gsbi5_uart_default>; 82*c66ec88fSEmmanuel Vadot 83*c66ec88fSEmmanuel Vadot gsbi5_uart_default: gsbi5_uart_default { 84*c66ec88fSEmmanuel Vadot mux { 85*c66ec88fSEmmanuel Vadot pins = "gpio18", "gpio19"; 86*c66ec88fSEmmanuel Vadot function = "gsbi5"; 87*c66ec88fSEmmanuel Vadot }; 88*c66ec88fSEmmanuel Vadot 89*c66ec88fSEmmanuel Vadot tx { 90*c66ec88fSEmmanuel Vadot pins = "gpio18"; 91*c66ec88fSEmmanuel Vadot drive-strength = <4>; 92*c66ec88fSEmmanuel Vadot bias-disable; 93*c66ec88fSEmmanuel Vadot }; 94*c66ec88fSEmmanuel Vadot 95*c66ec88fSEmmanuel Vadot rx { 96*c66ec88fSEmmanuel Vadot pins = "gpio19"; 97*c66ec88fSEmmanuel Vadot drive-strength = <2>; 98*c66ec88fSEmmanuel Vadot bias-pull-up; 99*c66ec88fSEmmanuel Vadot }; 100*c66ec88fSEmmanuel Vadot }; 101*c66ec88fSEmmanuel Vadot }; 102