1*f126890aSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*f126890aSEmmanuel Vadot%YAML 1.2 3*f126890aSEmmanuel Vadot--- 4*f126890aSEmmanuel Vadot$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-common.yaml# 5*f126890aSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*f126890aSEmmanuel Vadot 7*f126890aSEmmanuel Vadottitle: NVIDIA Tegra234 Pinmux Controller 8*f126890aSEmmanuel Vadot 9*f126890aSEmmanuel Vadotmaintainers: 10*f126890aSEmmanuel Vadot - Thierry Reding <thierry.reding@gmail.com> 11*f126890aSEmmanuel Vadot - Jon Hunter <jonathanh@nvidia.com> 12*f126890aSEmmanuel Vadot 13*f126890aSEmmanuel Vadotproperties: 14*f126890aSEmmanuel Vadot reg: 15*f126890aSEmmanuel Vadot items: 16*f126890aSEmmanuel Vadot - description: pinmux registers 17*f126890aSEmmanuel Vadot 18*f126890aSEmmanuel VadotpatternProperties: 19*f126890aSEmmanuel Vadot "^pinmux(-[a-z0-9-]+)?$": 20*f126890aSEmmanuel Vadot type: object 21*f126890aSEmmanuel Vadot 22*f126890aSEmmanuel Vadot # pin groups 23*f126890aSEmmanuel Vadot additionalProperties: 24*f126890aSEmmanuel Vadot $ref: nvidia,tegra-pinmux-common.yaml 25*f126890aSEmmanuel Vadot # We would typically use unevaluatedProperties here but that has the 26*f126890aSEmmanuel Vadot # downside that all the properties in the common bindings become valid 27*f126890aSEmmanuel Vadot # for all chip generations. In this case, however, we want the per-SoC 28*f126890aSEmmanuel Vadot # bindings to be able to override which of the common properties are 29*f126890aSEmmanuel Vadot # allowed, since not all pinmux generations support the same sets of 30*f126890aSEmmanuel Vadot # properties. This way, the common bindings define the format of the 31*f126890aSEmmanuel Vadot # properties but the per-SoC bindings define which of them apply to a 32*f126890aSEmmanuel Vadot # given chip. 33*f126890aSEmmanuel Vadot additionalProperties: false 34*f126890aSEmmanuel Vadot properties: 35*f126890aSEmmanuel Vadot nvidia,function: 36*f126890aSEmmanuel Vadot enum: [ gp, uartc, i2c8, spi2, i2c2, can1, can0, rsvd0, eth0, eth2, 37*f126890aSEmmanuel Vadot eth1, dp, eth3, i2c4, i2c7, i2c9, eqos, pe2, pe1, pe0, pe3, 38*f126890aSEmmanuel Vadot pe4, pe5, pe6, pe7, pe8, pe9, pe10, qspi0, qspi1, qpsi, 39*f126890aSEmmanuel Vadot sdmmc1, sce, soc, gpio, hdmi, ufs0, spi3, spi1, uartb, uarte, 40*f126890aSEmmanuel Vadot usb, extperiph2, extperiph1, i2c3, vi0, i2c5, uarta, uartd, 41*f126890aSEmmanuel Vadot i2c1, i2s4, i2s6, aud, spi5, touch, uartj, rsvd1, wdt, tsc, 42*f126890aSEmmanuel Vadot dmic3, led, vi0_alt, i2s5, nv, extperiph3, extperiph4, spi4, 43*f126890aSEmmanuel Vadot ccla, i2s1, i2s2, i2s3, i2s8, rsvd2, dmic5, dca, displayb, 44*f126890aSEmmanuel Vadot displaya, vi1, dcb, dmic1, dmic4, i2s7, dmic2, dspk0, rsvd3, 45*f126890aSEmmanuel Vadot tsc_alt, istctrl, vi1_alt, dspk1, igpu ] 46*f126890aSEmmanuel Vadot 47*f126890aSEmmanuel Vadot # out of the common properties, only these are allowed for Tegra234 48*f126890aSEmmanuel Vadot nvidia,pins: true 49*f126890aSEmmanuel Vadot nvidia,pull: true 50*f126890aSEmmanuel Vadot nvidia,tristate: true 51*f126890aSEmmanuel Vadot nvidia,schmitt: true 52*f126890aSEmmanuel Vadot nvidia,enable-input: true 53*f126890aSEmmanuel Vadot nvidia,open-drain: true 54*f126890aSEmmanuel Vadot nvidia,lock: true 55*f126890aSEmmanuel Vadot nvidia,drive-type: true 56*f126890aSEmmanuel Vadot nvidia,io-hv: true 57*f126890aSEmmanuel Vadot 58*f126890aSEmmanuel Vadot required: 59*f126890aSEmmanuel Vadot - nvidia,pins 60*f126890aSEmmanuel Vadot 61*f126890aSEmmanuel Vadotrequired: 62*f126890aSEmmanuel Vadot - compatible 63*f126890aSEmmanuel Vadot - reg 64*f126890aSEmmanuel Vadot 65*f126890aSEmmanuel VadotadditionalProperties: true 66*f126890aSEmmanuel Vadot... 67