1*c66ec88fSEmmanuel VadotDevice tree binding for NVIDIA Tegra XUSB pad controller 2*c66ec88fSEmmanuel Vadot======================================================== 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotNOTE: It turns out that this binding isn't an accurate description of the XUSB 5*c66ec88fSEmmanuel Vadotpad controller. While the description is good enough for the functional subset 6*c66ec88fSEmmanuel Vadotrequired for PCIe and SATA, it lacks the flexibility to represent the features 7*c66ec88fSEmmanuel Vadotneeded for USB. For the new binding, see ../phy/nvidia,tegra-xusb-padctl.txt. 8*c66ec88fSEmmanuel VadotThe binding described in this file is deprecated and should not be used. 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel VadotThe Tegra XUSB pad controller manages a set of lanes, each of which can be 11*c66ec88fSEmmanuel Vadotassigned to one out of a set of different pads. Some of these pads have an 12*c66ec88fSEmmanuel Vadotassociated PHY that must be powered up before the pad can be used. 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel VadotThis document defines the device-specific binding for the XUSB pad controller. 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel VadotRefer to pinctrl-bindings.txt in this directory for generic information about 17*c66ec88fSEmmanuel Vadotpin controller device tree bindings and ../phy/phy-bindings.txt for details on 18*c66ec88fSEmmanuel Vadothow to describe and reference PHYs in device trees. 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotRequired properties: 21*c66ec88fSEmmanuel Vadot-------------------- 22*c66ec88fSEmmanuel Vadot- compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl". 23*c66ec88fSEmmanuel Vadot Otherwise, must contain '"nvidia,<chip>-xusb-padctl", 24*c66ec88fSEmmanuel Vadot "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210. 25*c66ec88fSEmmanuel Vadot- reg: Physical base address and length of the controller's registers. 26*c66ec88fSEmmanuel Vadot- resets: Must contain an entry for each entry in reset-names. 27*c66ec88fSEmmanuel Vadot See ../reset/reset.txt for details. 28*c66ec88fSEmmanuel Vadot- reset-names: Must include the following entries: 29*c66ec88fSEmmanuel Vadot - padctl 30*c66ec88fSEmmanuel Vadot- #phy-cells: Should be 1. The specifier is the index of the PHY to reference. 31*c66ec88fSEmmanuel Vadot See <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> for the list of valid values. 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel VadotLane muxing: 34*c66ec88fSEmmanuel Vadot------------ 35*c66ec88fSEmmanuel Vadot 36*c66ec88fSEmmanuel VadotChild nodes contain the pinmux configurations following the conventions from 37*c66ec88fSEmmanuel Vadotthe pinctrl-bindings.txt document. Typically a single, static configuration is 38*c66ec88fSEmmanuel Vadotgiven and applied at boot time. 39*c66ec88fSEmmanuel Vadot 40*c66ec88fSEmmanuel VadotEach subnode describes groups of lanes along with parameters and pads that 41*c66ec88fSEmmanuel Vadotthey should be assigned to. The name of these subnodes is not important. All 42*c66ec88fSEmmanuel Vadotsubnodes should be parsed solely based on their content. 43*c66ec88fSEmmanuel Vadot 44*c66ec88fSEmmanuel VadotEach subnode only applies the parameters that are explicitly listed. In other 45*c66ec88fSEmmanuel Vadotwords, if a subnode that lists a function but no pin configuration parameters 46*c66ec88fSEmmanuel Vadotimplies no information about any pin configuration parameters. Similarly, a 47*c66ec88fSEmmanuel Vadotsubnode that describes only an IDDQ parameter implies no information about 48*c66ec88fSEmmanuel Vadotwhat function the pins are assigned to. For this reason even seemingly boolean 49*c66ec88fSEmmanuel Vadotvalues are actually tristates in this binding: unspecified, off or on. 50*c66ec88fSEmmanuel VadotUnspecified is represented as an absent property, and off/on are represented 51*c66ec88fSEmmanuel Vadotas integer values 0 and 1. 52*c66ec88fSEmmanuel Vadot 53*c66ec88fSEmmanuel VadotRequired properties: 54*c66ec88fSEmmanuel Vadot- nvidia,lanes: An array of strings. Each string is the name of a lane. 55*c66ec88fSEmmanuel Vadot 56*c66ec88fSEmmanuel VadotOptional properties: 57*c66ec88fSEmmanuel Vadot- nvidia,function: A string that is the name of the function (pad) that the 58*c66ec88fSEmmanuel Vadot pin or group should be assigned to. Valid values for function names are 59*c66ec88fSEmmanuel Vadot listed below. 60*c66ec88fSEmmanuel Vadot- nvidia,iddq: Enables IDDQ mode of the lane. (0: no, 1: yes) 61*c66ec88fSEmmanuel Vadot 62*c66ec88fSEmmanuel VadotNote that not all of these properties are valid for all lanes. Lanes can be 63*c66ec88fSEmmanuel Vadotdivided into three groups: 64*c66ec88fSEmmanuel Vadot 65*c66ec88fSEmmanuel Vadot - otg-0, otg-1, otg-2: 66*c66ec88fSEmmanuel Vadot 67*c66ec88fSEmmanuel Vadot Valid functions for this group are: "snps", "xusb", "uart", "rsvd". 68*c66ec88fSEmmanuel Vadot 69*c66ec88fSEmmanuel Vadot The nvidia,iddq property does not apply to this group. 70*c66ec88fSEmmanuel Vadot 71*c66ec88fSEmmanuel Vadot - ulpi-0, hsic-0, hsic-1: 72*c66ec88fSEmmanuel Vadot 73*c66ec88fSEmmanuel Vadot Valid functions for this group are: "snps", "xusb". 74*c66ec88fSEmmanuel Vadot 75*c66ec88fSEmmanuel Vadot The nvidia,iddq property does not apply to this group. 76*c66ec88fSEmmanuel Vadot 77*c66ec88fSEmmanuel Vadot - pcie-0, pcie-1, pcie-2, pcie-3, pcie-4, sata-0: 78*c66ec88fSEmmanuel Vadot 79*c66ec88fSEmmanuel Vadot Valid functions for this group are: "pcie", "usb3", "sata", "rsvd". 80*c66ec88fSEmmanuel Vadot 81*c66ec88fSEmmanuel Vadot 82*c66ec88fSEmmanuel VadotExample: 83*c66ec88fSEmmanuel Vadot======== 84*c66ec88fSEmmanuel Vadot 85*c66ec88fSEmmanuel VadotSoC file extract: 86*c66ec88fSEmmanuel Vadot----------------- 87*c66ec88fSEmmanuel Vadot 88*c66ec88fSEmmanuel Vadot padctl@7009f000 { 89*c66ec88fSEmmanuel Vadot compatible = "nvidia,tegra124-xusb-padctl"; 90*c66ec88fSEmmanuel Vadot reg = <0x0 0x7009f000 0x0 0x1000>; 91*c66ec88fSEmmanuel Vadot resets = <&tegra_car 142>; 92*c66ec88fSEmmanuel Vadot reset-names = "padctl"; 93*c66ec88fSEmmanuel Vadot 94*c66ec88fSEmmanuel Vadot #phy-cells = <1>; 95*c66ec88fSEmmanuel Vadot }; 96*c66ec88fSEmmanuel Vadot 97*c66ec88fSEmmanuel VadotBoard file extract: 98*c66ec88fSEmmanuel Vadot------------------- 99*c66ec88fSEmmanuel Vadot 100*c66ec88fSEmmanuel Vadot pcie-controller@1003000 { 101*c66ec88fSEmmanuel Vadot ... 102*c66ec88fSEmmanuel Vadot 103*c66ec88fSEmmanuel Vadot phys = <&padctl 0>; 104*c66ec88fSEmmanuel Vadot phy-names = "pcie"; 105*c66ec88fSEmmanuel Vadot 106*c66ec88fSEmmanuel Vadot ... 107*c66ec88fSEmmanuel Vadot }; 108*c66ec88fSEmmanuel Vadot 109*c66ec88fSEmmanuel Vadot ... 110*c66ec88fSEmmanuel Vadot 111*c66ec88fSEmmanuel Vadot padctl: padctl@7009f000 { 112*c66ec88fSEmmanuel Vadot pinctrl-0 = <&padctl_default>; 113*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 114*c66ec88fSEmmanuel Vadot 115*c66ec88fSEmmanuel Vadot padctl_default: pinmux { 116*c66ec88fSEmmanuel Vadot usb3 { 117*c66ec88fSEmmanuel Vadot nvidia,lanes = "pcie-0", "pcie-1"; 118*c66ec88fSEmmanuel Vadot nvidia,function = "usb3"; 119*c66ec88fSEmmanuel Vadot nvidia,iddq = <0>; 120*c66ec88fSEmmanuel Vadot }; 121*c66ec88fSEmmanuel Vadot 122*c66ec88fSEmmanuel Vadot pcie { 123*c66ec88fSEmmanuel Vadot nvidia,lanes = "pcie-2", "pcie-3", 124*c66ec88fSEmmanuel Vadot "pcie-4"; 125*c66ec88fSEmmanuel Vadot nvidia,function = "pcie"; 126*c66ec88fSEmmanuel Vadot nvidia,iddq = <0>; 127*c66ec88fSEmmanuel Vadot }; 128*c66ec88fSEmmanuel Vadot 129*c66ec88fSEmmanuel Vadot sata { 130*c66ec88fSEmmanuel Vadot nvidia,lanes = "sata-0"; 131*c66ec88fSEmmanuel Vadot nvidia,function = "sata"; 132*c66ec88fSEmmanuel Vadot nvidia,iddq = <0>; 133*c66ec88fSEmmanuel Vadot }; 134*c66ec88fSEmmanuel Vadot }; 135*c66ec88fSEmmanuel Vadot }; 136