1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/ingenic,pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Ingenic SoCs pin controller devicetree bindings 8 9description: > 10 Please refer to pinctrl-bindings.txt in this directory for details of the 11 common pinctrl bindings used by client devices, including the meaning of the 12 phrase "pin configuration node". 13 14 For the Ingenic SoCs, pin control is tightly bound with GPIO ports. All pins 15 may be used as GPIOs, multiplexed device functions are configured within the 16 GPIO port configuration registers and it is typical to refer to pins using the 17 naming scheme "PxN" where x is a character identifying the GPIO port with 18 which the pin is associated and N is an integer from 0 to 31 identifying the 19 pin within that GPIO port. For example PA0 is the first pin in GPIO port A, 20 and PB31 is the last pin in GPIO port B. The JZ4740, the X1000 and the X1830 21 contains 4 GPIO ports, PA to PD, for a total of 128 pins. The JZ4760, the 22 JZ4770 and the JZ4780 contains 6 GPIO ports, PA to PF, for a total of 192 23 pins. 24 25maintainers: 26 - Paul Cercueil <paul@crapouillou.net> 27 28properties: 29 nodename: 30 pattern: "^pinctrl@[0-9a-f]+$" 31 32 compatible: 33 oneOf: 34 - enum: 35 - ingenic,jz4740-pinctrl 36 - ingenic,jz4725b-pinctrl 37 - ingenic,jz4760-pinctrl 38 - ingenic,jz4770-pinctrl 39 - ingenic,jz4780-pinctrl 40 - ingenic,x1000-pinctrl 41 - ingenic,x1500-pinctrl 42 - ingenic,x1830-pinctrl 43 - items: 44 - const: ingenic,jz4760b-pinctrl 45 - const: ingenic,jz4760-pinctrl 46 - items: 47 - const: ingenic,x1000e-pinctrl 48 - const: ingenic,x1000-pinctrl 49 50 reg: 51 maxItems: 1 52 53 "#address-cells": 54 const: 1 55 56 "#size-cells": 57 const: 0 58 59patternProperties: 60 "^gpio@[0-9]$": 61 type: object 62 properties: 63 compatible: 64 enum: 65 - ingenic,jz4740-gpio 66 - ingenic,jz4725b-gpio 67 - ingenic,jz4760-gpio 68 - ingenic,jz4770-gpio 69 - ingenic,jz4780-gpio 70 - ingenic,x1000-gpio 71 - ingenic,x1500-gpio 72 - ingenic,x1830-gpio 73 74 reg: 75 items: 76 - description: The GPIO bank number 77 78 gpio-controller: true 79 80 "#gpio-cells": 81 const: 2 82 83 gpio-ranges: 84 maxItems: 1 85 86 interrupt-controller: true 87 88 "#interrupt-cells": 89 const: 2 90 description: 91 Refer to ../interrupt-controller/interrupts.txt for more details. 92 93 interrupts: 94 maxItems: 1 95 96 required: 97 - compatible 98 - reg 99 - gpio-controller 100 - "#gpio-cells" 101 - interrupts 102 - interrupt-controller 103 - "#interrupt-cells" 104 105 additionalProperties: false 106 107required: 108 - compatible 109 - reg 110 - "#address-cells" 111 - "#size-cells" 112 113additionalProperties: 114 anyOf: 115 - type: object 116 allOf: 117 - $ref: pincfg-node.yaml# 118 - $ref: pinmux-node.yaml# 119 120 properties: 121 phandle: true 122 function: true 123 groups: true 124 pins: true 125 bias-disable: true 126 bias-pull-up: true 127 bias-pull-down: true 128 output-low: true 129 output-high: true 130 additionalProperties: false 131 132 - type: object 133 properties: 134 phandle: true 135 additionalProperties: 136 type: object 137 allOf: 138 - $ref: pincfg-node.yaml# 139 - $ref: pinmux-node.yaml# 140 141 properties: 142 phandle: true 143 function: true 144 groups: true 145 pins: true 146 bias-disable: true 147 bias-pull-up: true 148 bias-pull-down: true 149 output-low: true 150 output-high: true 151 additionalProperties: false 152 153examples: 154 - | 155 pin-controller@10010000 { 156 compatible = "ingenic,jz4770-pinctrl"; 157 reg = <0x10010000 0x600>; 158 159 #address-cells = <1>; 160 #size-cells = <0>; 161 162 gpio@0 { 163 compatible = "ingenic,jz4770-gpio"; 164 reg = <0>; 165 166 gpio-controller; 167 gpio-ranges = <&pinctrl 0 0 32>; 168 #gpio-cells = <2>; 169 170 interrupt-controller; 171 #interrupt-cells = <2>; 172 173 interrupt-parent = <&intc>; 174 interrupts = <17>; 175 }; 176 }; 177