1*c66ec88fSEmmanuel VadotIngenic XBurst pin controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotPlease refer to pinctrl-bindings.txt in this directory for details of the 4*c66ec88fSEmmanuel Vadotcommon pinctrl bindings used by client devices, including the meaning of the 5*c66ec88fSEmmanuel Vadotphrase "pin configuration node". 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel VadotFor the XBurst SoCs, pin control is tightly bound with GPIO ports. All pins may 8*c66ec88fSEmmanuel Vadotbe used as GPIOs, multiplexed device functions are configured within the 9*c66ec88fSEmmanuel VadotGPIO port configuration registers and it is typical to refer to pins using the 10*c66ec88fSEmmanuel Vadotnaming scheme "PxN" where x is a character identifying the GPIO port with 11*c66ec88fSEmmanuel Vadotwhich the pin is associated and N is an integer from 0 to 31 identifying the 12*c66ec88fSEmmanuel Vadotpin within that GPIO port. For example PA0 is the first pin in GPIO port A, and 13*c66ec88fSEmmanuel VadotPB31 is the last pin in GPIO port B. The jz4740, the x1000 and the x1830 14*c66ec88fSEmmanuel Vadotcontains 4 GPIO ports, PA to PD, for a total of 128 pins. The jz4760, the 15*c66ec88fSEmmanuel Vadotjz4770 and the jz4780 contains 6 GPIO ports, PA to PF, for a total of 192 pins. 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotRequired properties: 19*c66ec88fSEmmanuel Vadot-------------------- 20*c66ec88fSEmmanuel Vadot 21*c66ec88fSEmmanuel Vadot - compatible: One of: 22*c66ec88fSEmmanuel Vadot - "ingenic,jz4740-pinctrl" 23*c66ec88fSEmmanuel Vadot - "ingenic,jz4725b-pinctrl" 24*c66ec88fSEmmanuel Vadot - "ingenic,jz4760-pinctrl" 25*c66ec88fSEmmanuel Vadot - "ingenic,jz4760b-pinctrl" 26*c66ec88fSEmmanuel Vadot - "ingenic,jz4770-pinctrl" 27*c66ec88fSEmmanuel Vadot - "ingenic,jz4780-pinctrl" 28*c66ec88fSEmmanuel Vadot - "ingenic,x1000-pinctrl" 29*c66ec88fSEmmanuel Vadot - "ingenic,x1000e-pinctrl" 30*c66ec88fSEmmanuel Vadot - "ingenic,x1500-pinctrl" 31*c66ec88fSEmmanuel Vadot - "ingenic,x1830-pinctrl" 32*c66ec88fSEmmanuel Vadot - reg: Address range of the pinctrl registers. 33*c66ec88fSEmmanuel Vadot 34*c66ec88fSEmmanuel Vadot 35*c66ec88fSEmmanuel VadotRequired properties for sub-nodes (GPIO chips): 36*c66ec88fSEmmanuel Vadot----------------------------------------------- 37*c66ec88fSEmmanuel Vadot 38*c66ec88fSEmmanuel Vadot - compatible: Must contain one of: 39*c66ec88fSEmmanuel Vadot - "ingenic,jz4740-gpio" 40*c66ec88fSEmmanuel Vadot - "ingenic,jz4760-gpio" 41*c66ec88fSEmmanuel Vadot - "ingenic,jz4770-gpio" 42*c66ec88fSEmmanuel Vadot - "ingenic,jz4780-gpio" 43*c66ec88fSEmmanuel Vadot - "ingenic,x1000-gpio" 44*c66ec88fSEmmanuel Vadot - "ingenic,x1830-gpio" 45*c66ec88fSEmmanuel Vadot - reg: The GPIO bank number. 46*c66ec88fSEmmanuel Vadot - interrupt-controller: Marks the device node as an interrupt controller. 47*c66ec88fSEmmanuel Vadot - interrupts: Interrupt specifier for the controllers interrupt. 48*c66ec88fSEmmanuel Vadot - #interrupt-cells: Should be 2. Refer to 49*c66ec88fSEmmanuel Vadot ../interrupt-controller/interrupts.txt for more details. 50*c66ec88fSEmmanuel Vadot - gpio-controller: Marks the device node as a GPIO controller. 51*c66ec88fSEmmanuel Vadot - #gpio-cells: Should be 2. The first cell is the GPIO number and the second 52*c66ec88fSEmmanuel Vadot cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the 53*c66ec88fSEmmanuel Vadot GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. 54*c66ec88fSEmmanuel Vadot - gpio-ranges: Range of pins managed by the GPIO controller. Refer to 55*c66ec88fSEmmanuel Vadot ../gpio/gpio.txt for more details. 56*c66ec88fSEmmanuel Vadot 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel VadotExample: 59*c66ec88fSEmmanuel Vadot-------- 60*c66ec88fSEmmanuel Vadot 61*c66ec88fSEmmanuel Vadotpinctrl: pin-controller@10010000 { 62*c66ec88fSEmmanuel Vadot compatible = "ingenic,jz4740-pinctrl"; 63*c66ec88fSEmmanuel Vadot reg = <0x10010000 0x400>; 64*c66ec88fSEmmanuel Vadot #address-cells = <1>; 65*c66ec88fSEmmanuel Vadot #size-cells = <0>; 66*c66ec88fSEmmanuel Vadot 67*c66ec88fSEmmanuel Vadot gpa: gpio@0 { 68*c66ec88fSEmmanuel Vadot compatible = "ingenic,jz4740-gpio"; 69*c66ec88fSEmmanuel Vadot reg = <0>; 70*c66ec88fSEmmanuel Vadot 71*c66ec88fSEmmanuel Vadot gpio-controller; 72*c66ec88fSEmmanuel Vadot gpio-ranges = <&pinctrl 0 0 32>; 73*c66ec88fSEmmanuel Vadot #gpio-cells = <2>; 74*c66ec88fSEmmanuel Vadot 75*c66ec88fSEmmanuel Vadot interrupt-controller; 76*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 77*c66ec88fSEmmanuel Vadot 78*c66ec88fSEmmanuel Vadot interrupt-parent = <&intc>; 79*c66ec88fSEmmanuel Vadot interrupts = <28>; 80*c66ec88fSEmmanuel Vadot }; 81*c66ec88fSEmmanuel Vadot}; 82