1*c66ec88fSEmmanuel VadotImagination Technologies Pistachio SoC pin controllers 2*c66ec88fSEmmanuel Vadot====================================================== 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotThe pin controllers on Pistachio are a combined GPIO controller, (GPIO) 5*c66ec88fSEmmanuel Vadotinterrupt controller, and pinmux + pinconf device. The system ("east") pin 6*c66ec88fSEmmanuel Vadotcontroller on Pistachio has 99 pins, 90 of which are MFIOs which can be 7*c66ec88fSEmmanuel Vadotconfigured as GPIOs. The 90 GPIOs are divided into 6 banks of up to 16 GPIOs 8*c66ec88fSEmmanuel Vadoteach. The GPIO banks are represented as sub-nodes of the pad controller node. 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel VadotPlease refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and 11*c66ec88fSEmmanuel Vadot../interrupt-controller/interrupts.txt for generic information regarding 12*c66ec88fSEmmanuel Vadotpin controller, GPIO, and interrupt bindings. 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel VadotRequired properties for pin controller node: 15*c66ec88fSEmmanuel Vadot-------------------------------------------- 16*c66ec88fSEmmanuel Vadot - compatible: "img,pistachio-system-pinctrl". 17*c66ec88fSEmmanuel Vadot - reg: Address range of the pinctrl registers. 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel VadotRequired properties for GPIO bank sub-nodes: 20*c66ec88fSEmmanuel Vadot-------------------------------------------- 21*c66ec88fSEmmanuel Vadot - interrupts: Interrupt line for the GPIO bank. 22*c66ec88fSEmmanuel Vadot - gpio-controller: Indicates the device is a GPIO controller. 23*c66ec88fSEmmanuel Vadot - #gpio-cells: Must be two. The first cell is the GPIO pin number and the 24*c66ec88fSEmmanuel Vadot second cell indicates the polarity. See <dt-bindings/gpio/gpio.h> for 25*c66ec88fSEmmanuel Vadot a list of possible values. 26*c66ec88fSEmmanuel Vadot - interrupt-controller: Indicates the device is an interrupt controller. 27*c66ec88fSEmmanuel Vadot - #interrupt-cells: Must be two. The first cell is the GPIO pin number and 28*c66ec88fSEmmanuel Vadot the second cell encodes the interrupt flags. See 29*c66ec88fSEmmanuel Vadot <dt-bindings/interrupt-controller/irq.h> for a list of valid flags. 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel VadotNote that the N GPIO bank sub-nodes *must* be named gpio0, gpio1, ... gpioN-1. 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel VadotRequired properties for pin configuration sub-nodes: 34*c66ec88fSEmmanuel Vadot---------------------------------------------------- 35*c66ec88fSEmmanuel Vadot - pins: List of pins to which the configuration applies. See below for a 36*c66ec88fSEmmanuel Vadot list of possible pins. 37*c66ec88fSEmmanuel Vadot 38*c66ec88fSEmmanuel VadotOptional properties for pin configuration sub-nodes: 39*c66ec88fSEmmanuel Vadot---------------------------------------------------- 40*c66ec88fSEmmanuel Vadot - function: Mux function for the specified pins. This is not applicable for 41*c66ec88fSEmmanuel Vadot non-MFIO pins. See below for a list of valid functions for each pin. 42*c66ec88fSEmmanuel Vadot - bias-high-impedance: Enable high-impedance mode. 43*c66ec88fSEmmanuel Vadot - bias-pull-up: Enable weak pull-up. 44*c66ec88fSEmmanuel Vadot - bias-pull-down: Enable weak pull-down. 45*c66ec88fSEmmanuel Vadot - bias-bus-hold: Enable bus-keeper mode. 46*c66ec88fSEmmanuel Vadot - drive-strength: Drive strength in mA. Supported values: 2, 4, 8, 12. 47*c66ec88fSEmmanuel Vadot - input-schmitt-enable: Enable Schmitt trigger. 48*c66ec88fSEmmanuel Vadot - input-schmitt-disable: Disable Schmitt trigger. 49*c66ec88fSEmmanuel Vadot - slew-rate: Slew rate control. 0 for slow, 1 for fast. 50*c66ec88fSEmmanuel Vadot 51*c66ec88fSEmmanuel VadotPin Functions 52*c66ec88fSEmmanuel Vadot--- --------- 53*c66ec88fSEmmanuel Vadotmfio0 spim1 54*c66ec88fSEmmanuel Vadotmfio1 spim1, spim0, uart1 55*c66ec88fSEmmanuel Vadotmfio2 spim1, spim0, uart1 56*c66ec88fSEmmanuel Vadotmfio3 spim1 57*c66ec88fSEmmanuel Vadotmfio4 spim1 58*c66ec88fSEmmanuel Vadotmfio5 spim1 59*c66ec88fSEmmanuel Vadotmfio6 spim1 60*c66ec88fSEmmanuel Vadotmfio7 spim1 61*c66ec88fSEmmanuel Vadotmfio8 spim0 62*c66ec88fSEmmanuel Vadotmfio9 spim0 63*c66ec88fSEmmanuel Vadotmfio10 spim0 64*c66ec88fSEmmanuel Vadotmfio11 spis 65*c66ec88fSEmmanuel Vadotmfio12 spis 66*c66ec88fSEmmanuel Vadotmfio13 spis 67*c66ec88fSEmmanuel Vadotmfio14 spis 68*c66ec88fSEmmanuel Vadotmfio15 sdhost, mips_trace_clk, mips_trace_data 69*c66ec88fSEmmanuel Vadotmfio16 sdhost, mips_trace_dint, mips_trace_data 70*c66ec88fSEmmanuel Vadotmfio17 sdhost, mips_trace_trigout, mips_trace_data 71*c66ec88fSEmmanuel Vadotmfio18 sdhost, mips_trace_trigin, mips_trace_data 72*c66ec88fSEmmanuel Vadotmfio19 sdhost, mips_trace_dm, mips_trace_data 73*c66ec88fSEmmanuel Vadotmfio20 sdhost, mips_trace_probe_n, mips_trace_data 74*c66ec88fSEmmanuel Vadotmfio21 sdhost, mips_trace_data 75*c66ec88fSEmmanuel Vadotmfio22 sdhost, mips_trace_data 76*c66ec88fSEmmanuel Vadotmfio23 sdhost 77*c66ec88fSEmmanuel Vadotmfio24 sdhost 78*c66ec88fSEmmanuel Vadotmfio25 sdhost 79*c66ec88fSEmmanuel Vadotmfio26 sdhost 80*c66ec88fSEmmanuel Vadotmfio27 sdhost 81*c66ec88fSEmmanuel Vadotmfio28 i2c0, spim0 82*c66ec88fSEmmanuel Vadotmfio29 i2c0, spim0 83*c66ec88fSEmmanuel Vadotmfio30 i2c1, spim0 84*c66ec88fSEmmanuel Vadotmfio31 i2c1, spim1 85*c66ec88fSEmmanuel Vadotmfio32 i2c2 86*c66ec88fSEmmanuel Vadotmfio33 i2c2 87*c66ec88fSEmmanuel Vadotmfio34 i2c3 88*c66ec88fSEmmanuel Vadotmfio35 i2c3 89*c66ec88fSEmmanuel Vadotmfio36 i2s_out, audio_clk_in 90*c66ec88fSEmmanuel Vadotmfio37 i2s_out, debug_raw_cca_ind 91*c66ec88fSEmmanuel Vadotmfio38 i2s_out, debug_ed_sec20_cca_ind 92*c66ec88fSEmmanuel Vadotmfio39 i2s_out, debug_ed_sec40_cca_ind 93*c66ec88fSEmmanuel Vadotmfio40 i2s_out, debug_agc_done_0 94*c66ec88fSEmmanuel Vadotmfio41 i2s_out, debug_agc_done_1 95*c66ec88fSEmmanuel Vadotmfio42 i2s_out, debug_ed_cca_ind 96*c66ec88fSEmmanuel Vadotmfio43 i2s_out, debug_s2l_done 97*c66ec88fSEmmanuel Vadotmfio44 i2s_out 98*c66ec88fSEmmanuel Vadotmfio45 i2s_dac_clk, audio_sync 99*c66ec88fSEmmanuel Vadotmfio46 audio_trigger 100*c66ec88fSEmmanuel Vadotmfio47 i2s_in 101*c66ec88fSEmmanuel Vadotmfio48 i2s_in 102*c66ec88fSEmmanuel Vadotmfio49 i2s_in 103*c66ec88fSEmmanuel Vadotmfio50 i2s_in 104*c66ec88fSEmmanuel Vadotmfio51 i2s_in 105*c66ec88fSEmmanuel Vadotmfio52 i2s_in 106*c66ec88fSEmmanuel Vadotmfio53 i2s_in 107*c66ec88fSEmmanuel Vadotmfio54 i2s_in, spdif_in 108*c66ec88fSEmmanuel Vadotmfio55 uart0, spim0, spim1 109*c66ec88fSEmmanuel Vadotmfio56 uart0, spim0, spim1 110*c66ec88fSEmmanuel Vadotmfio57 uart0, spim0, spim1 111*c66ec88fSEmmanuel Vadotmfio58 uart0, spim1 112*c66ec88fSEmmanuel Vadotmfio59 uart1 113*c66ec88fSEmmanuel Vadotmfio60 uart1 114*c66ec88fSEmmanuel Vadotmfio61 spdif_out 115*c66ec88fSEmmanuel Vadotmfio62 spdif_in 116*c66ec88fSEmmanuel Vadotmfio63 eth, mips_trace_clk, mips_trace_data 117*c66ec88fSEmmanuel Vadotmfio64 eth, mips_trace_dint, mips_trace_data 118*c66ec88fSEmmanuel Vadotmfio65 eth, mips_trace_trigout, mips_trace_data 119*c66ec88fSEmmanuel Vadotmfio66 eth, mips_trace_trigin, mips_trace_data 120*c66ec88fSEmmanuel Vadotmfio67 eth, mips_trace_dm, mips_trace_data 121*c66ec88fSEmmanuel Vadotmfio68 eth, mips_trace_probe_n, mips_trace_data 122*c66ec88fSEmmanuel Vadotmfio69 eth, mips_trace_data 123*c66ec88fSEmmanuel Vadotmfio70 eth, mips_trace_data 124*c66ec88fSEmmanuel Vadotmfio71 eth 125*c66ec88fSEmmanuel Vadotmfio72 ir 126*c66ec88fSEmmanuel Vadotmfio73 pwmpdm, mips_trace_clk, sram_debug 127*c66ec88fSEmmanuel Vadotmfio74 pwmpdm, mips_trace_dint, sram_debug 128*c66ec88fSEmmanuel Vadotmfio75 pwmpdm, mips_trace_trigout, rom_debug 129*c66ec88fSEmmanuel Vadotmfio76 pwmpdm, mips_trace_trigin, rom_debug 130*c66ec88fSEmmanuel Vadotmfio77 mdc_debug, mips_trace_dm, rpu_debug 131*c66ec88fSEmmanuel Vadotmfio78 mdc_debug, mips_trace_probe_n, rpu_debug 132*c66ec88fSEmmanuel Vadotmfio79 ddr_debug, mips_trace_data, mips_debug 133*c66ec88fSEmmanuel Vadotmfio80 ddr_debug, mips_trace_data, mips_debug 134*c66ec88fSEmmanuel Vadotmfio81 dreq0, mips_trace_data, eth_debug 135*c66ec88fSEmmanuel Vadotmfio82 dreq1, mips_trace_data, eth_debug 136*c66ec88fSEmmanuel Vadotmfio83 mips_pll_lock, mips_trace_data, usb_debug 137*c66ec88fSEmmanuel Vadotmfio84 audio_pll_lock, mips_trace_data, usb_debug 138*c66ec88fSEmmanuel Vadotmfio85 rpu_v_pll_lock, mips_trace_data, sdhost_debug 139*c66ec88fSEmmanuel Vadotmfio86 rpu_l_pll_lock, mips_trace_data, sdhost_debug 140*c66ec88fSEmmanuel Vadotmfio87 sys_pll_lock, dreq2, socif_debug 141*c66ec88fSEmmanuel Vadotmfio88 wifi_pll_lock, dreq3, socif_debug 142*c66ec88fSEmmanuel Vadotmfio89 bt_pll_lock, dreq4, dreq5 143*c66ec88fSEmmanuel Vadottck 144*c66ec88fSEmmanuel Vadottrstn 145*c66ec88fSEmmanuel Vadottdi 146*c66ec88fSEmmanuel Vadottms 147*c66ec88fSEmmanuel Vadottdo 148*c66ec88fSEmmanuel Vadotjtag_comply 149*c66ec88fSEmmanuel Vadotsafe_mode 150*c66ec88fSEmmanuel Vadotpor_disable 151*c66ec88fSEmmanuel Vadotresetn 152*c66ec88fSEmmanuel Vadot 153*c66ec88fSEmmanuel VadotExample: 154*c66ec88fSEmmanuel Vadot-------- 155*c66ec88fSEmmanuel Vadotpinctrl@18101c00 { 156*c66ec88fSEmmanuel Vadot compatible = "img,pistachio-system-pinctrl"; 157*c66ec88fSEmmanuel Vadot reg = <0x18101C00 0x400>; 158*c66ec88fSEmmanuel Vadot 159*c66ec88fSEmmanuel Vadot gpio0: gpio0 { 160*c66ec88fSEmmanuel Vadot interrupts = <GIC_SHARED 71 IRQ_TYPE_LEVEL_HIGH>; 161*c66ec88fSEmmanuel Vadot 162*c66ec88fSEmmanuel Vadot gpio-controller; 163*c66ec88fSEmmanuel Vadot #gpio-cells = <2>; 164*c66ec88fSEmmanuel Vadot 165*c66ec88fSEmmanuel Vadot interrupt-controller; 166*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 167*c66ec88fSEmmanuel Vadot }; 168*c66ec88fSEmmanuel Vadot 169*c66ec88fSEmmanuel Vadot ... 170*c66ec88fSEmmanuel Vadot 171*c66ec88fSEmmanuel Vadot gpio5: gpio5 { 172*c66ec88fSEmmanuel Vadot interrupts = <GIC_SHARED 76 IRQ_TYPE_LEVEL_HIGH>; 173*c66ec88fSEmmanuel Vadot 174*c66ec88fSEmmanuel Vadot gpio-controller; 175*c66ec88fSEmmanuel Vadot #gpio-cells = <2>; 176*c66ec88fSEmmanuel Vadot 177*c66ec88fSEmmanuel Vadot interrupt-controller; 178*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 179*c66ec88fSEmmanuel Vadot }; 180*c66ec88fSEmmanuel Vadot 181*c66ec88fSEmmanuel Vadot ... 182*c66ec88fSEmmanuel Vadot 183*c66ec88fSEmmanuel Vadot uart0_xfer: uart0-xfer { 184*c66ec88fSEmmanuel Vadot uart0-rxd { 185*c66ec88fSEmmanuel Vadot pins = "mfio55"; 186*c66ec88fSEmmanuel Vadot function = "uart0"; 187*c66ec88fSEmmanuel Vadot }; 188*c66ec88fSEmmanuel Vadot uart0-txd { 189*c66ec88fSEmmanuel Vadot pins = "mfio56"; 190*c66ec88fSEmmanuel Vadot function = "uart0"; 191*c66ec88fSEmmanuel Vadot }; 192*c66ec88fSEmmanuel Vadot }; 193*c66ec88fSEmmanuel Vadot 194*c66ec88fSEmmanuel Vadot uart0_rts_cts: uart0-rts-cts { 195*c66ec88fSEmmanuel Vadot uart0-rts { 196*c66ec88fSEmmanuel Vadot pins = "mfio57"; 197*c66ec88fSEmmanuel Vadot function = "uart0"; 198*c66ec88fSEmmanuel Vadot }; 199*c66ec88fSEmmanuel Vadot uart0-cts { 200*c66ec88fSEmmanuel Vadot pins = "mfio58"; 201*c66ec88fSEmmanuel Vadot function = "uart0"; 202*c66ec88fSEmmanuel Vadot }; 203*c66ec88fSEmmanuel Vadot }; 204*c66ec88fSEmmanuel Vadot}; 205*c66ec88fSEmmanuel Vadot 206*c66ec88fSEmmanuel Vadotuart@... { 207*c66ec88fSEmmanuel Vadot ... 208*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 209*c66ec88fSEmmanuel Vadot pinctrl-0 = <&uart0_xfer>, <&uart0_rts_cts>; 210*c66ec88fSEmmanuel Vadot ... 211*c66ec88fSEmmanuel Vadot}; 212*c66ec88fSEmmanuel Vadot 213*c66ec88fSEmmanuel Vadotusb_vbus: fixed-regulator { 214*c66ec88fSEmmanuel Vadot ... 215*c66ec88fSEmmanuel Vadot gpio = <&gpio5 6 GPIO_ACTIVE_HIGH>; 216*c66ec88fSEmmanuel Vadot ... 217*c66ec88fSEmmanuel Vadot}; 218