1# SPDX-License-Identifier: GPL-2.0-or-later 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ASPEED AST2500 Pin Controller 8 9maintainers: 10 - Andrew Jeffery <andrew@aj.id.au> 11 12description: |+ 13 The pin controller node should be the child of a syscon node with the 14 required property: 15 16 - compatible: Should be one of the following: 17 "aspeed,ast2500-scu", "syscon", "simple-mfd" 18 "aspeed,g5-scu", "syscon", "simple-mfd" 19 20 Refer to the the bindings described in 21 Documentation/devicetree/bindings/mfd/syscon.yaml 22 23properties: 24 compatible: 25 const: aspeed,ast2500-pinctrl 26 reg: 27 maxItems: 2 28 29 aspeed,external-nodes: 30 minItems: 2 31 maxItems: 2 32 $ref: /schemas/types.yaml#/definitions/phandle-array 33 description: | 34 A cell of phandles to external controller nodes: 35 0: compatible with "aspeed,ast2500-gfx", "syscon" 36 1: compatible with "aspeed,ast2500-lhc", "syscon" 37 38patternProperties: 39 '^.*$': 40 if: 41 type: object 42 then: 43 patternProperties: 44 "^function|groups$": 45 $ref: "/schemas/types.yaml#/definitions/string" 46 enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, 47 ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT, 48 ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4, GPID6, GPIE0, GPIE2, 49 GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4, I2C5, 50 I2C6, I2C7, I2C8, I2C9, LAD0, LAD1, LAD2, LAD3, LCLK, LFRAME, LPCHC, 51 LPCPD, LPCPLUS, LPCPME, LPCRST, LPCSMI, LSIRQ, MAC1LINK, MAC2LINK, 52 MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, 53 NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2, 54 NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PNOR, PWM0, 55 PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1, 56 RMII2, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12, SALT13, 57 SALT14, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9, SCL1, 58 SCL2, SD1, SD2, SDA1, SDA2, SGPS1, SGPS2, SIOONCTRL, SIOPBI, SIOPBO, 59 SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1CS1, SPI1DEBUG, 60 SPI1PASSTHRU, SPI2CK, SPI2CS0, SPI2CS1, SPI2MISO, SPI2MOSI, TIMER3, 61 TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2, TXD3, TXD4, UART6, 62 USB11BHID, USB2AD, USB2AH, USB2BD, USB2BH, USBCKI, VGABIOSROM, VGAHS, 63 VGAVS, VPI24, VPO, WDTRST1, WDTRST2] 64 65required: 66 - compatible 67 - aspeed,external-nodes 68 69additionalProperties: false 70 71examples: 72 - | 73 apb { 74 compatible = "simple-bus"; 75 #address-cells = <1>; 76 #size-cells = <1>; 77 ranges; 78 79 syscon: scu@1e6e2000 { 80 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd"; 81 reg = <0x1e6e2000 0x1a8>; 82 83 pinctrl: pinctrl { 84 compatible = "aspeed,ast2500-pinctrl"; 85 aspeed,external-nodes = <&gfx>, <&lhc>; 86 87 pinctrl_i2c3_default: i2c3_default { 88 function = "I2C3"; 89 groups = "I2C3"; 90 }; 91 92 pinctrl_gpioh0_unbiased_default: gpioh0 { 93 pins = "A18"; 94 bias-disable; 95 }; 96 }; 97 }; 98 99 gfx: display@1e6e6000 { 100 compatible = "aspeed,ast2500-gfx", "syscon"; 101 reg = <0x1e6e6000 0x1000>; 102 }; 103 }; 104 105 lpc: lpc@1e789000 { 106 compatible = "aspeed,ast2500-lpc", "simple-mfd"; 107 reg = <0x1e789000 0x1000>; 108 109 #address-cells = <1>; 110 #size-cells = <1>; 111 ranges = <0x0 0x1e789000 0x1000>; 112 113 lpc_host: lpc-host@80 { 114 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; 115 reg = <0x80 0x1e0>; 116 reg-io-width = <4>; 117 118 #address-cells = <1>; 119 #size-cells = <1>; 120 ranges = <0x0 0x80 0x1e0>; 121 122 lhc: lhc@20 { 123 compatible = "aspeed,ast2500-lhc"; 124 reg = <0x20 0x24>, <0x48 0x8>; 125 }; 126 }; 127 }; 128