1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A10 Pin Controller Device Tree Bindings 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13properties: 14 "#gpio-cells": 15 const: 3 16 description: 17 GPIO consumers must use three arguments, first the number of the 18 bank, then the pin number inside that bank, and finally the GPIO 19 flags. 20 21 "#interrupt-cells": 22 const: 3 23 description: 24 Interrupts consumers must use three arguments, first the number 25 of the bank, then the pin number inside that bank, and finally 26 the interrupts flags. 27 28 compatible: 29 enum: 30 - allwinner,sun4i-a10-pinctrl 31 - allwinner,sun5i-a10s-pinctrl 32 - allwinner,sun5i-a13-pinctrl 33 - allwinner,sun6i-a31-pinctrl 34 - allwinner,sun6i-a31-r-pinctrl 35 - allwinner,sun6i-a31s-pinctrl 36 - allwinner,sun7i-a20-pinctrl 37 - allwinner,sun8i-a23-pinctrl 38 - allwinner,sun8i-a23-r-pinctrl 39 - allwinner,sun8i-a33-pinctrl 40 - allwinner,sun8i-a83t-pinctrl 41 - allwinner,sun8i-a83t-r-pinctrl 42 - allwinner,sun8i-h3-pinctrl 43 - allwinner,sun8i-h3-r-pinctrl 44 - allwinner,sun8i-r40-pinctrl 45 - allwinner,sun8i-v3-pinctrl 46 - allwinner,sun8i-v3s-pinctrl 47 - allwinner,sun9i-a80-pinctrl 48 - allwinner,sun9i-a80-r-pinctrl 49 - allwinner,sun50i-a64-pinctrl 50 - allwinner,sun50i-a64-r-pinctrl 51 - allwinner,sun50i-h5-pinctrl 52 - allwinner,sun50i-h6-pinctrl 53 - allwinner,sun50i-h6-r-pinctrl 54 - allwinner,suniv-f1c100s-pinctrl 55 - nextthing,gr8-pinctrl 56 57 reg: 58 maxItems: 1 59 60 interrupts: 61 minItems: 1 62 maxItems: 5 63 description: 64 One interrupt per external interrupt bank supported on the 65 controller, sorted by bank number ascending order. 66 67 clocks: 68 items: 69 - description: Bus Clock 70 - description: High Frequency Oscillator 71 - description: Low Frequency Oscillator 72 73 clock-names: 74 items: 75 - const: apb 76 - const: hosc 77 - const: losc 78 79 resets: 80 maxItems: 1 81 82 gpio-controller: true 83 interrupt-controller: true 84 gpio-line-names: true 85 86 input-debounce: 87 description: 88 Debouncing periods in microseconds, one period per interrupt 89 bank found in the controller 90 $ref: /schemas/types.yaml#/definitions/uint32-array 91 minItems: 1 92 maxItems: 5 93 94patternProperties: 95 # It's pretty scary, but the basic idea is that: 96 # - One node name can start with either s- or r- for PRCM nodes, 97 # - Then, the name itself can be any repetition of <string>- (to 98 # accomodate with nodes like uart4-rts-cts-pins), where each 99 # string can be either starting with 'p' but in a string longer 100 # than 3, or something that doesn't start with 'p', 101 # - Then, the bank name is optional and will be between pa and pg, 102 # pl or pm. Some pins groups that have several options will have 103 # the pin numbers then, 104 # - Finally, the name will end with either -pin or pins. 105 106 "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$": 107 type: object 108 109 properties: 110 pins: true 111 function: true 112 bias-disable: true 113 bias-pull-up: true 114 bias-pull-down: true 115 116 drive-strength: 117 $ref: /schemas/types.yaml#/definitions/uint32 118 enum: [10, 20, 30, 40] 119 120 required: 121 - pins 122 - function 123 124 additionalProperties: false 125 126 "^vcc-p[a-hlm]-supply$": 127 description: 128 Power supplies for pin banks. 129 130required: 131 - "#gpio-cells" 132 - "#interrupt-cells" 133 - compatible 134 - reg 135 - interrupts 136 - clocks 137 - clock-names 138 - gpio-controller 139 - interrupt-controller 140 141allOf: 142 # FIXME: We should have the pin bank supplies here, but not a lot of 143 # boards are defining it at the moment so it would generate a lot of 144 # warnings. 145 146 - if: 147 properties: 148 compatible: 149 enum: 150 - allwinner,sun9i-a80-pinctrl 151 152 then: 153 properties: 154 interrupts: 155 minItems: 5 156 maxItems: 5 157 158 else: 159 if: 160 properties: 161 compatible: 162 enum: 163 - allwinner,sun6i-a31-pinctrl 164 - allwinner,sun6i-a31s-pinctrl 165 - allwinner,sun50i-h6-pinctrl 166 167 then: 168 properties: 169 interrupts: 170 minItems: 4 171 maxItems: 4 172 173 else: 174 if: 175 properties: 176 compatible: 177 enum: 178 - allwinner,sun8i-a23-pinctrl 179 - allwinner,sun8i-a83t-pinctrl 180 - allwinner,sun50i-a64-pinctrl 181 - allwinner,sun50i-h5-pinctrl 182 - allwinner,suniv-f1c100s-pinctrl 183 184 then: 185 properties: 186 interrupts: 187 minItems: 3 188 maxItems: 3 189 190 else: 191 if: 192 properties: 193 compatible: 194 enum: 195 - allwinner,sun6i-a31-r-pinctrl 196 - allwinner,sun8i-a33-pinctrl 197 - allwinner,sun8i-h3-pinctrl 198 - allwinner,sun8i-v3-pinctrl 199 - allwinner,sun8i-v3s-pinctrl 200 - allwinner,sun9i-a80-r-pinctrl 201 - allwinner,sun50i-h6-r-pinctrl 202 203 then: 204 properties: 205 interrupts: 206 minItems: 2 207 maxItems: 2 208 209 else: 210 properties: 211 interrupts: 212 minItems: 1 213 maxItems: 1 214 215additionalProperties: false 216 217examples: 218 - | 219 #include <dt-bindings/clock/sun5i-ccu.h> 220 221 pio: pinctrl@1c20800 { 222 compatible = "allwinner,sun5i-a13-pinctrl"; 223 reg = <0x01c20800 0x400>; 224 interrupts = <28>; 225 clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; 226 clock-names = "apb", "hosc", "losc"; 227 gpio-controller; 228 interrupt-controller; 229 #interrupt-cells = <3>; 230 #gpio-cells = <3>; 231 232 uart1_pe_pins: uart1-pe-pins { 233 pins = "PE10", "PE11"; 234 function = "uart1"; 235 }; 236 237 uart1_pg_pins: uart1-pg-pins { 238 pins = "PG3", "PG4"; 239 function = "uart1"; 240 }; 241 }; 242