xref: /freebsd/sys/contrib/device-tree/Bindings/phy/ti-phy-gmii-sel.txt (revision 3ff01b231dfa83d518854c63e7c9cd1debd1139e) 
1CPSW Port's Interface Mode Selection PHY Tree Bindings
2-----------------------------------------------
3
4TI am335x/am437x/dra7(am5)/dm814x CPSW3G Ethernet Subsystem supports
5two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces.
6The interface mode is selected by configuring the MII mode selection register(s)
7(GMII_SEL) in the System Control Module chapter (SCM). GMII_SEL register(s) and
8bit fields placement in SCM are different between SoCs while fields meaning
9is the same.
10                                               +--------------+
11        +-------------------------------+      |SCM           |
12        |                     CPSW      |      |  +---------+ |
13        |        +--------------------------------+gmii_sel | |
14        |        |                      |      |  +---------+ |
15        |   +----v---+     +--------+   |      +--------------+
16        |   |Port 1..<--+-->GMII/MII<------->
17        |   |        |  |  |        |   |
18        |   +--------+  |  +--------+   |
19        |               |               |
20        |               |  +--------+   |
21        |               |  | RMII   <------->
22        |               +-->        |   |
23        |               |  +--------+   |
24        |               |               |
25        |               |  +--------+   |
26        |               |  | RGMII  <------->
27        |               +-->        |   |
28        |                  +--------+   |
29        +-------------------------------+
30
31CPSW Port's Interface Mode Selection PHY describes MII interface mode between
32CPSW Port and Ethernet PHY which depends on Eth PHY and board configuration.
33
34CPSW Port's Interface Mode Selection PHY device should defined as child device
35of SCM node (scm_conf) and can be attached to each CPSW port node using standard
36PHY bindings (See phy/phy-bindings.txt).
37
38Required properties:
39- compatible		: Should be "ti,am3352-phy-gmii-sel" for am335x platform
40			  "ti,dra7xx-phy-gmii-sel" for dra7xx/am57xx platform
41			  "ti,am43xx-phy-gmii-sel" for am43xx platform
42			  "ti,dm814-phy-gmii-sel" for dm814x platform
43			  "ti,am654-phy-gmii-sel" for AM654x/J721E platform
44- reg			: Address and length of the register set for the device
45- #phy-cells		: must be 2.
46			  cell 1 - CPSW port number (starting from 1)
47			  cell 2 - RMII refclk mode
48
49Examples:
50	phy_gmii_sel: phy-gmii-sel {
51		compatible = "ti,am3352-phy-gmii-sel";
52		reg = <0x650 0x4>;
53		#phy-cells = <2>;
54	};
55
56	mac: ethernet@4a100000 {
57		compatible = "ti,am335x-cpsw","ti,cpsw";
58		...
59
60		cpsw_emac0: slave@4a100200 {
61			...
62			phys = <&phy_gmii_sel 1 1>;
63		};
64
65		cpsw_emac1: slave@4a100300 {
66			...
67			phys = <&phy_gmii_sel 2 1>;
68		};
69	};
70