xref: /freebsd/sys/contrib/device-tree/Bindings/phy/socionext,uniphier-usb3ss-phy.yaml (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier USB3 Super-Speed (SS) PHY
8
9description: |
10  This describes the devicetree bindings for PHY interfaces built into
11  USB3 controller implemented on Socionext UniPhier SoCs.
12  Although the controller includes High-Speed PHY and Super-Speed PHY,
13  this describes about Super-Speed PHY.
14
15maintainers:
16  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
17
18properties:
19  compatible:
20    enum:
21      - socionext,uniphier-pro4-usb3-ssphy
22      - socionext,uniphier-pro5-usb3-ssphy
23      - socionext,uniphier-pxs2-usb3-ssphy
24      - socionext,uniphier-ld20-usb3-ssphy
25      - socionext,uniphier-pxs3-usb3-ssphy
26
27  reg:
28    description: PHY register region (offset and length)
29
30  "#phy-cells":
31    const: 0
32
33  clocks:
34    minItems: 2
35    maxItems: 3
36
37  clock-names:
38    oneOf:
39      - items:             # for Pro4, Pro5
40          - const: gio
41          - const: link
42      - items:             # for PXs3 with phy-ext
43          - const: link
44          - const: phy
45          - const: phy-ext
46      - items:             # for others
47          - const: link
48          - const: phy
49
50  resets:
51    maxItems: 2
52
53  reset-names:
54    oneOf:
55      - items:              # for Pro4,Pro5
56          - const: gio
57          - const: link
58      - items:              # for others
59          - const: link
60          - const: phy
61
62  vbus-supply:
63    description: A phandle to the regulator for USB VBUS
64
65required:
66  - compatible
67  - reg
68  - "#phy-cells"
69  - clocks
70  - clock-names
71  - resets
72  - reset-names
73  - vbus-supply
74
75additionalProperties: false
76
77examples:
78  - |
79    usb-glue@65b00000 {
80        compatible = "socionext,uniphier-ld20-dwc3-glue",
81                     "simple-mfd";
82        #address-cells = <1>;
83        #size-cells = <1>;
84        ranges = <0 0x65b00000 0x400>;
85
86        usb_ssphy0: ss-phy@300 {
87            compatible = "socionext,uniphier-ld20-usb3-ssphy";
88            reg = <0x300 0x10>;
89            #phy-cells = <0>;
90            clock-names = "link", "phy";
91            clocks = <&sys_clk 14>, <&sys_clk 16>;
92            reset-names = "link", "phy";
93            resets = <&sys_rst 14>, <&sys_rst 16>;
94            vbus-supply = <&usb_vbus0>;
95        };
96    };
97