1c66ec88fSEmmanuel VadotRockchip EMMC PHY 2c66ec88fSEmmanuel Vadot----------------------- 3c66ec88fSEmmanuel Vadot 4c66ec88fSEmmanuel VadotRequired properties: 5c66ec88fSEmmanuel Vadot - compatible: rockchip,rk3399-emmc-phy 6c66ec88fSEmmanuel Vadot - #phy-cells: must be 0 7c66ec88fSEmmanuel Vadot - reg: PHY register address offset and length in "general 8c66ec88fSEmmanuel Vadot register files" 9c66ec88fSEmmanuel Vadot 10c66ec88fSEmmanuel VadotOptional properties: 11c66ec88fSEmmanuel Vadot - clock-names: Should contain "emmcclk". Although this is listed as optional 12c66ec88fSEmmanuel Vadot (because most boards can get basic functionality without having 13c66ec88fSEmmanuel Vadot access to it), it is strongly suggested. 14c66ec88fSEmmanuel Vadot See ../clock/clock-bindings.txt for details. 15c66ec88fSEmmanuel Vadot - clocks: Should have a phandle to the card clock exported by the SDHCI driver. 16c66ec88fSEmmanuel Vadot - drive-impedance-ohm: Specifies the drive impedance in Ohm. 17c66ec88fSEmmanuel Vadot Possible values are 33, 40, 50, 66 and 100. 18c66ec88fSEmmanuel Vadot If not set, the default value of 50 will be applied. 19*5def4c47SEmmanuel Vadot - rockchip,enable-strobe-pulldown: Enable internal pull-down for the strobe 20*5def4c47SEmmanuel Vadot line. If not set, pull-down is not used. 21*5def4c47SEmmanuel Vadot - rockchip,output-tapdelay-select: Specifies the phyctrl_otapdlysec register. 22*5def4c47SEmmanuel Vadot If not set, the register defaults to 0x4. 23*5def4c47SEmmanuel Vadot Maximum value 0xf. 24c66ec88fSEmmanuel Vadot 25c66ec88fSEmmanuel VadotExample: 26c66ec88fSEmmanuel Vadot 27c66ec88fSEmmanuel Vadot 28c66ec88fSEmmanuel Vadotgrf: syscon@ff770000 { 29c66ec88fSEmmanuel Vadot compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; 30c66ec88fSEmmanuel Vadot #address-cells = <1>; 31c66ec88fSEmmanuel Vadot #size-cells = <1>; 32c66ec88fSEmmanuel Vadot 33c66ec88fSEmmanuel Vadot... 34c66ec88fSEmmanuel Vadot 35c66ec88fSEmmanuel Vadot emmcphy: phy@f780 { 36c66ec88fSEmmanuel Vadot compatible = "rockchip,rk3399-emmc-phy"; 37c66ec88fSEmmanuel Vadot reg = <0xf780 0x20>; 38c66ec88fSEmmanuel Vadot clocks = <&sdhci>; 39c66ec88fSEmmanuel Vadot clock-names = "emmcclk"; 40c66ec88fSEmmanuel Vadot drive-impedance-ohm = <50>; 41c66ec88fSEmmanuel Vadot #phy-cells = <0>; 42c66ec88fSEmmanuel Vadot }; 43c66ec88fSEmmanuel Vadot}; 44