xref: /freebsd/sys/contrib/device-tree/Bindings/phy/qcom,usb-snps-femto-v2.yaml (revision f81cdf24ba5436367377f7c8e8f51f6df2a75ca7)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Synopsys Femto High-Speed USB PHY V2
8
9maintainers:
10  - Wesley Cheng <quic_wcheng@quicinc.com>
11
12description: |
13  Qualcomm High-Speed USB PHY
14
15properties:
16  compatible:
17    oneOf:
18      - enum:
19          - qcom,sc8180x-usb-hs-phy
20          - qcom,usb-snps-femto-v2-phy
21      - items:
22          - enum:
23              - qcom,sc8280xp-usb-hs-phy
24          - const: qcom,usb-snps-hs-5nm-phy
25      - items:
26          - enum:
27              - qcom,sc7280-usb-hs-phy
28              - qcom,sdx55-usb-hs-phy
29              - qcom,sdx65-usb-hs-phy
30              - qcom,sm6375-usb-hs-phy
31              - qcom,sm8150-usb-hs-phy
32              - qcom,sm8250-usb-hs-phy
33              - qcom,sm8350-usb-hs-phy
34              - qcom,sm8450-usb-hs-phy
35          - const: qcom,usb-snps-hs-7nm-phy
36
37  reg:
38    maxItems: 1
39
40  "#phy-cells":
41    const: 0
42
43  clocks:
44    items:
45      - description: rpmhcc ref clock
46
47  clock-names:
48    items:
49      - const: ref
50
51  resets:
52    items:
53      - description: PHY core reset
54
55  vdda-pll-supply:
56    description: phandle to the regulator VDD supply node.
57
58  vdda18-supply:
59    description: phandle to the regulator 1.8V supply node.
60
61  vdda33-supply:
62    description: phandle to the regulator 3.3V supply node.
63
64  qcom,hs-disconnect-bp:
65    description:
66      This adjusts the voltage level for the threshold used to
67      detect a disconnect event at the host.
68      The hardware accepts only discrete values. The value closest to the
69      provided input will be chosen as the override value for this param.
70    minimum: -272
71    maximum: 2156
72
73  qcom,squelch-detector-bp:
74    description:
75      This adjusts the voltage level for the threshold used to
76      detect valid high-speed data.
77      The hardware accepts only discrete values. The value closest to the
78      provided input will be chosen as the override value for this param.
79    minimum: -2090
80    maximum: 1590
81
82  qcom,hs-amplitude-bp:
83    description:
84      This adjusts the high-speed DC level voltage.
85      The hardware accepts only discrete values. The value closest to the
86      provided input will be chosen as the override value for this param.
87    minimum: -660
88    maximum: 2670
89
90  qcom,pre-emphasis-duration-bp:
91    description:
92      This signal controls the duration for which the
93      HS pre-emphasis current is sourced onto DP<#> or DM<#>.
94      The HS Transmitter pre-emphasis duration is defined in terms of
95      unit amounts. One unit of pre-emphasis duration is approximately
96      650 ps and is defined as 1X pre-emphasis duration.
97      The hardware accepts only discrete values. The value closest to the
98      provided input will be chosen as the override value for this param.
99    minimum: 10000
100    maximum: 20000
101
102  qcom,pre-emphasis-amplitude-bp:
103    description:
104      This signal controls the amount of current sourced to
105      DP<#> and DM<#> after a J-to-K or K-to-J transition.
106      The HS Transmitter pre-emphasis current is defined in terms of unit
107      amounts. One unit amount is approximately 2 mA and is defined as
108      1X pre-emphasis current.
109      The hardware accepts only discrete values. The value closest to the
110      provided input will be chosen as the override value for this param.
111    minimum: 10000
112    maximum: 40000
113
114  qcom,hs-rise-fall-time-bp:
115    description:
116      This adjusts the rise/fall times of the high-speed waveform.
117      The hardware accepts only discrete values. The value closest to the
118      provided input will be chosen as the override value for this param.
119    minimum: -4100
120    maximum: 5430
121
122  qcom,hs-crossover-voltage-microvolt:
123    description:
124      This adjusts the voltage at which the DP<#> and DM<#>
125      signals cross while transmitting in HS mode.
126      The hardware accepts only discrete values. The value closest to the
127      provided input will be chosen as the override value for this param.
128    minimum: -31000
129    maximum: 28000
130
131  qcom,hs-output-impedance-micro-ohms:
132    description:
133      In some applications, there can be significant series resistance
134      on the D+ and D- paths between the transceiver and cable. This adjusts
135      the driver source impedance to compensate for added series
136      resistance on the USB. The hardware accepts only discrete values. The
137      value closest to the provided input will be chosen as the override value
138      for this param.
139    minimum: -2300000
140    maximum: 6100000
141
142  qcom,ls-fs-output-impedance-bp:
143    description:
144      This adjusts the low- and full-speed single-ended source
145      impedance while driving high. The following adjustment values are based
146      on nominal process, voltage, and temperature.
147      The hardware accepts only discrete values. The value closest to the
148      provided input will be chosen as the override value for this param.
149    minimum: -1053
150    maximum: 1310
151
152required:
153  - compatible
154  - reg
155  - "#phy-cells"
156  - clocks
157  - clock-names
158  - resets
159  - vdda-pll-supply
160  - vdda18-supply
161  - vdda33-supply
162
163additionalProperties: false
164
165examples:
166  - |
167    #include <dt-bindings/clock/qcom,rpmh.h>
168    #include <dt-bindings/clock/qcom,gcc-sm8150.h>
169    phy@88e2000 {
170        compatible = "qcom,sm8150-usb-hs-phy", "qcom,usb-snps-hs-7nm-phy";
171        reg = <0x088e2000 0x400>;
172        #phy-cells = <0>;
173
174        clocks = <&rpmhcc RPMH_CXO_CLK>;
175        clock-names = "ref";
176
177        resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
178
179        vdda-pll-supply = <&vdd_usb_hs_core>;
180        vdda33-supply = <&vdda_usb_hs_3p1>;
181        vdda18-supply = <&vdda_usb_hs_1p8>;
182    };
183...
184