1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Synopsys Femto High-Speed USB PHY V2 8 9maintainers: 10 - Wesley Cheng <quic_wcheng@quicinc.com> 11 12description: | 13 Qualcomm High-Speed USB PHY 14 15properties: 16 compatible: 17 oneOf: 18 - enum: 19 - qcom,sc8180x-usb-hs-phy 20 - qcom,usb-snps-femto-v2-phy 21 - items: 22 - enum: 23 - qcom,sa8775p-usb-hs-phy 24 - qcom,sc8280xp-usb-hs-phy 25 - const: qcom,usb-snps-hs-5nm-phy 26 - items: 27 - enum: 28 - qcom,sc7280-usb-hs-phy 29 - qcom,sdx55-usb-hs-phy 30 - qcom,sdx65-usb-hs-phy 31 - qcom,sm6375-usb-hs-phy 32 - qcom,sm8150-usb-hs-phy 33 - qcom,sm8250-usb-hs-phy 34 - qcom,sm8350-usb-hs-phy 35 - qcom,sm8450-usb-hs-phy 36 - const: qcom,usb-snps-hs-7nm-phy 37 38 reg: 39 maxItems: 1 40 41 "#phy-cells": 42 const: 0 43 44 clocks: 45 items: 46 - description: rpmhcc ref clock 47 48 clock-names: 49 items: 50 - const: ref 51 52 resets: 53 items: 54 - description: PHY core reset 55 56 vdda-pll-supply: 57 description: phandle to the regulator VDD supply node. 58 59 vdda18-supply: 60 description: phandle to the regulator 1.8V supply node. 61 62 vdda33-supply: 63 description: phandle to the regulator 3.3V supply node. 64 65 qcom,hs-disconnect-bp: 66 description: 67 This adjusts the voltage level for the threshold used to 68 detect a disconnect event at the host. 69 The hardware accepts only discrete values. The value closest to the 70 provided input will be chosen as the override value for this param. 71 minimum: -272 72 maximum: 2156 73 74 qcom,squelch-detector-bp: 75 description: 76 This adjusts the voltage level for the threshold used to 77 detect valid high-speed data. 78 The hardware accepts only discrete values. The value closest to the 79 provided input will be chosen as the override value for this param. 80 minimum: -2090 81 maximum: 1590 82 83 qcom,hs-amplitude-bp: 84 description: 85 This adjusts the high-speed DC level voltage. 86 The hardware accepts only discrete values. The value closest to the 87 provided input will be chosen as the override value for this param. 88 minimum: -660 89 maximum: 2670 90 91 qcom,pre-emphasis-duration-bp: 92 description: 93 This signal controls the duration for which the 94 HS pre-emphasis current is sourced onto DP<#> or DM<#>. 95 The HS Transmitter pre-emphasis duration is defined in terms of 96 unit amounts. One unit of pre-emphasis duration is approximately 97 650 ps and is defined as 1X pre-emphasis duration. 98 The hardware accepts only discrete values. The value closest to the 99 provided input will be chosen as the override value for this param. 100 minimum: 10000 101 maximum: 20000 102 103 qcom,pre-emphasis-amplitude-bp: 104 description: 105 This signal controls the amount of current sourced to 106 DP<#> and DM<#> after a J-to-K or K-to-J transition. 107 The HS Transmitter pre-emphasis current is defined in terms of unit 108 amounts. One unit amount is approximately 2 mA and is defined as 109 1X pre-emphasis current. 110 The hardware accepts only discrete values. The value closest to the 111 provided input will be chosen as the override value for this param. 112 minimum: 10000 113 maximum: 40000 114 115 qcom,hs-rise-fall-time-bp: 116 description: 117 This adjusts the rise/fall times of the high-speed waveform. 118 The hardware accepts only discrete values. The value closest to the 119 provided input will be chosen as the override value for this param. 120 minimum: -4100 121 maximum: 5430 122 123 qcom,hs-crossover-voltage-microvolt: 124 description: 125 This adjusts the voltage at which the DP<#> and DM<#> 126 signals cross while transmitting in HS mode. 127 The hardware accepts only discrete values. The value closest to the 128 provided input will be chosen as the override value for this param. 129 minimum: -31000 130 maximum: 28000 131 132 qcom,hs-output-impedance-micro-ohms: 133 description: 134 In some applications, there can be significant series resistance 135 on the D+ and D- paths between the transceiver and cable. This adjusts 136 the driver source impedance to compensate for added series 137 resistance on the USB. The hardware accepts only discrete values. The 138 value closest to the provided input will be chosen as the override value 139 for this param. 140 minimum: -2300000 141 maximum: 6100000 142 143 qcom,ls-fs-output-impedance-bp: 144 description: 145 This adjusts the low- and full-speed single-ended source 146 impedance while driving high. The following adjustment values are based 147 on nominal process, voltage, and temperature. 148 The hardware accepts only discrete values. The value closest to the 149 provided input will be chosen as the override value for this param. 150 minimum: -1053 151 maximum: 1310 152 153required: 154 - compatible 155 - reg 156 - "#phy-cells" 157 - clocks 158 - clock-names 159 - resets 160 - vdda-pll-supply 161 - vdda18-supply 162 - vdda33-supply 163 164additionalProperties: false 165 166examples: 167 - | 168 #include <dt-bindings/clock/qcom,rpmh.h> 169 #include <dt-bindings/clock/qcom,gcc-sm8150.h> 170 phy@88e2000 { 171 compatible = "qcom,sm8150-usb-hs-phy", "qcom,usb-snps-hs-7nm-phy"; 172 reg = <0x088e2000 0x400>; 173 #phy-cells = <0>; 174 175 clocks = <&rpmhcc RPMH_CXO_CLK>; 176 clock-names = "ref"; 177 178 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 179 180 vdda-pll-supply = <&vdd_usb_hs_core>; 181 vdda33-supply = <&vdda_usb_hs_3p1>; 182 vdda18-supply = <&vdda_usb_hs_1p8>; 183 }; 184... 185