xref: /freebsd/sys/contrib/device-tree/Bindings/phy/qcom,snps-eusb2-phy.yaml (revision f81cdf24ba5436367377f7c8e8f51f6df2a75ca7) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SNPS eUSB2 phy controller
8
9maintainers:
10  - Abel Vesa <abel.vesa@linaro.org>
11
12description:
13  eUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
14
15properties:
16  compatible:
17    const: qcom,sm8550-snps-eusb2-phy
18
19  reg:
20    maxItems: 1
21
22  "#phy-cells":
23    const: 0
24
25  clocks:
26    items:
27      - description: ref
28
29  clock-names:
30    items:
31      - const: ref
32
33  resets:
34    maxItems: 1
35
36  phys:
37    maxItems: 1
38    description:
39      Phandle to eUSB2 to USB 2.0 repeater
40
41  vdd-supply:
42    description:
43      Phandle to 0.88V regulator supply to PHY digital circuit.
44
45  vdda12-supply:
46    description:
47      Phandle to 1.2V regulator supply to PHY refclk pll block.
48
49required:
50  - compatible
51  - reg
52  - "#phy-cells"
53  - clocks
54  - clock-names
55  - vdd-supply
56  - vdda12-supply
57  - resets
58
59additionalProperties: false
60
61examples:
62  - |
63    #include <dt-bindings/clock/qcom,sm8550-gcc.h>
64    #include <dt-bindings/clock/qcom,rpmh.h>
65    #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
66
67    usb_1_hsphy: phy@88e3000 {
68        compatible = "qcom,sm8550-snps-eusb2-phy";
69        reg = <0x88e3000 0x154>;
70        #phy-cells = <0>;
71
72        clocks = <&tcsrcc TCSR_USB2_CLKREF_EN>;
73        clock-names = "ref";
74
75        vdd-supply = <&vreg_l1e_0p88>;
76        vdda12-supply = <&vreg_l3e_1p2>;
77
78        resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
79    };
80