xref: /freebsd/sys/contrib/device-tree/Bindings/phy/qcom,qmp-phy.yaml (revision 5956d97f4b3204318ceb6aa9c77bd0bc6ea87a41) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm QMP PHY controller
9
10maintainers:
11  - Manu Gautam <mgautam@codeaurora.org>
12
13description:
14  QMP phy controller supports physical layer functionality for a number of
15  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
16
17properties:
18  compatible:
19    enum:
20      - qcom,ipq6018-qmp-pcie-phy
21      - qcom,ipq8074-qmp-pcie-phy
22      - qcom,ipq8074-qmp-usb3-phy
23      - qcom,msm8996-qmp-pcie-phy
24      - qcom,msm8996-qmp-ufs-phy
25      - qcom,msm8996-qmp-usb3-phy
26      - qcom,msm8998-qmp-pcie-phy
27      - qcom,msm8998-qmp-ufs-phy
28      - qcom,msm8998-qmp-usb3-phy
29      - qcom,sc7180-qmp-usb3-phy
30      - qcom,sc8180x-qmp-ufs-phy
31      - qcom,sc8180x-qmp-usb3-phy
32      - qcom,sdm845-qhp-pcie-phy
33      - qcom,sdm845-qmp-pcie-phy
34      - qcom,sdm845-qmp-ufs-phy
35      - qcom,sdm845-qmp-usb3-phy
36      - qcom,sdm845-qmp-usb3-uni-phy
37      - qcom,sm8150-qmp-ufs-phy
38      - qcom,sm8150-qmp-usb3-phy
39      - qcom,sm8150-qmp-usb3-uni-phy
40      - qcom,sm8250-qmp-ufs-phy
41      - qcom,sm8250-qmp-gen3x1-pcie-phy
42      - qcom,sm8250-qmp-gen3x2-pcie-phy
43      - qcom,sm8250-qmp-modem-pcie-phy
44      - qcom,sm8250-qmp-usb3-phy
45      - qcom,sm8250-qmp-usb3-uni-phy
46      - qcom,sm8350-qmp-ufs-phy
47      - qcom,sm8350-qmp-usb3-phy
48      - qcom,sm8350-qmp-usb3-uni-phy
49      - qcom,sdx55-qmp-pcie-phy
50      - qcom,sdx55-qmp-usb3-uni-phy
51
52  reg:
53    minItems: 1
54    items:
55      - description: Address and length of PHY's common serdes block.
56      - description: Address and length of PHY's DP_COM control block.
57
58  "#clock-cells":
59    enum: [ 1, 2 ]
60
61  "#address-cells":
62    enum: [ 1, 2 ]
63
64  "#size-cells":
65    enum: [ 1, 2 ]
66
67  ranges: true
68
69  clocks:
70    minItems: 1
71    maxItems: 4
72
73  clock-names:
74    minItems: 1
75    maxItems: 4
76
77  resets:
78    minItems: 1
79    maxItems: 3
80
81  reset-names:
82    minItems: 1
83    maxItems: 3
84
85  vdda-phy-supply:
86    description:
87      Phandle to a regulator supply to PHY core block.
88
89  vdda-pll-supply:
90    description:
91      Phandle to 1.8V regulator supply to PHY refclk pll block.
92
93  vddp-ref-clk-supply:
94    description:
95      Phandle to a regulator supply to any specific refclk pll block.
96
97#Required nodes:
98patternProperties:
99  "^phy@[0-9a-f]+$":
100    type: object
101    description:
102      Each device node of QMP phy is required to have as many child nodes as
103      the number of lanes the PHY has.
104
105required:
106  - compatible
107  - reg
108  - "#clock-cells"
109  - "#address-cells"
110  - "#size-cells"
111  - ranges
112  - clocks
113  - clock-names
114  - resets
115  - reset-names
116  - vdda-phy-supply
117  - vdda-pll-supply
118
119additionalProperties: false
120
121allOf:
122  - if:
123      properties:
124        compatible:
125          contains:
126            enum:
127              - qcom,sdm845-qmp-usb3-uni-phy
128    then:
129      properties:
130        clocks:
131          items:
132            - description: Phy aux clock.
133            - description: Phy config clock.
134            - description: 19.2 MHz ref clk.
135            - description: Phy common block aux clock.
136        clock-names:
137          items:
138            - const: aux
139            - const: cfg_ahb
140            - const: ref
141            - const: com_aux
142        resets:
143          items:
144            - description: reset of phy block.
145            - description: phy common block reset.
146        reset-names:
147          items:
148            - const: phy
149            - const: common
150  - if:
151      properties:
152        compatible:
153          contains:
154            enum:
155              - qcom,sdx55-qmp-usb3-uni-phy
156    then:
157      properties:
158        clocks:
159          items:
160            - description: Phy aux clock.
161            - description: Phy config clock.
162            - description: 19.2 MHz ref clk.
163        clock-names:
164          items:
165            - const: aux
166            - const: cfg_ahb
167            - const: ref
168        resets:
169          items:
170            - description: reset of phy block.
171            - description: phy common block reset.
172        reset-names:
173          items:
174            - const: phy
175            - const: common
176  - if:
177      properties:
178        compatible:
179          contains:
180            enum:
181              - qcom,msm8996-qmp-pcie-phy
182    then:
183      properties:
184        clocks:
185          items:
186            - description: Phy aux clock.
187            - description: Phy config clock.
188            - description: 19.2 MHz ref clk.
189        clock-names:
190          items:
191            - const: aux
192            - const: cfg_ahb
193            - const: ref
194        resets:
195          items:
196            - description: reset of phy block.
197            - description: phy common block reset.
198            - description: phy's ahb cfg block reset.
199        reset-names:
200          items:
201            - const: phy
202            - const: common
203            - const: cfg
204  - if:
205      properties:
206        compatible:
207          contains:
208            enum:
209              - qcom,ipq8074-qmp-usb3-phy
210              - qcom,msm8996-qmp-usb3-phy
211              - qcom,msm8998-qmp-pcie-phy
212              - qcom,msm8998-qmp-usb3-phy
213    then:
214      properties:
215        clocks:
216          items:
217            - description: Phy aux clock.
218            - description: Phy config clock.
219            - description: 19.2 MHz ref clk.
220        clock-names:
221          items:
222            - const: aux
223            - const: cfg_ahb
224            - const: ref
225        resets:
226          items:
227            - description: reset of phy block.
228            - description: phy common block reset.
229        reset-names:
230          items:
231            - const: phy
232            - const: common
233  - if:
234      properties:
235        compatible:
236          contains:
237            enum:
238              - qcom,msm8996-qmp-ufs-phy
239    then:
240      properties:
241        clocks:
242          items:
243            - description: 19.2 MHz ref clk.
244        clock-names:
245          items:
246            - const: ref
247        resets:
248          items:
249            - description: PHY reset in the UFS controller.
250        reset-names:
251          items:
252            - const: ufsphy
253  - if:
254      properties:
255        compatible:
256          contains:
257            enum:
258              - qcom,msm8998-qmp-ufs-phy
259              - qcom,sdm845-qmp-ufs-phy
260              - qcom,sm8150-qmp-ufs-phy
261              - qcom,sm8250-qmp-ufs-phy
262    then:
263      properties:
264        clocks:
265          items:
266            - description: 19.2 MHz ref clk.
267            - description: Phy reference aux clock.
268        clock-names:
269          items:
270            - const: ref
271            - const: ref_aux
272        resets:
273          items:
274            - description: PHY reset in the UFS controller.
275        reset-names:
276          items:
277            - const: ufsphy
278  - if:
279      properties:
280        compatible:
281          contains:
282            enum:
283              - qcom,ipq8074-qmp-pcie-phy
284    then:
285      properties:
286        clocks:
287          items:
288            - description: pipe clk.
289        clock-names:
290          items:
291            - const: pipe_clk
292        resets:
293          items:
294            - description: reset of phy block.
295            - description: phy common block reset.
296        reset-names:
297          items:
298            - const: phy
299            - const: common
300  - if:
301      properties:
302        compatible:
303          contains:
304            enum:
305              - qcom,ipq6018-qmp-pcie-phy
306    then:
307      properties:
308        clocks:
309          items:
310            - description: Phy aux clock.
311            - description: Phy config clock.
312        clock-names:
313          items:
314            - const: aux
315            - const: cfg_ahb
316        resets:
317          items:
318            - description: reset of phy block.
319            - description: phy common block reset.
320        reset-names:
321          items:
322            - const: phy
323            - const: common
324  - if:
325      properties:
326        compatible:
327          contains:
328            enum:
329              - qcom,sdm845-qhp-pcie-phy
330              - qcom,sdm845-qmp-pcie-phy
331              - qcom,sdx55-qmp-pcie-phy
332              - qcom,sm8250-qmp-gen3x1-pcie-phy
333              - qcom,sm8250-qmp-gen3x2-pcie-phy
334              - qcom,sm8250-qmp-modem-pcie-phy
335    then:
336      properties:
337        clocks:
338          items:
339            - description: Phy aux clock.
340            - description: Phy config clock.
341            - description: 19.2 MHz ref clk.
342            - description: Phy refgen clk.
343        clock-names:
344          items:
345            - const: aux
346            - const: cfg_ahb
347            - const: ref
348            - const: refgen
349        resets:
350          items:
351            - description: reset of phy block.
352        reset-names:
353          items:
354            - const: phy
355  - if:
356      properties:
357        compatible:
358          contains:
359            enum:
360              - qcom,sm8150-qmp-usb3-phy
361              - qcom,sm8150-qmp-usb3-uni-phy
362              - qcom,sm8250-qmp-usb3-uni-phy
363              - qcom,sm8350-qmp-usb3-uni-phy
364    then:
365      properties:
366        clocks:
367          items:
368            - description: Phy aux clock.
369            - description: 19.2 MHz ref clk source.
370            - description: 19.2 MHz ref clk.
371            - description: Phy common block aux clock.
372        clock-names:
373          items:
374            - const: aux
375            - const: ref_clk_src
376            - const: ref
377            - const: com_aux
378        resets:
379          items:
380            - description: reset of phy block.
381            - description: phy common block reset.
382        reset-names:
383          items:
384            - const: phy
385            - const: common
386  - if:
387      properties:
388        compatible:
389          contains:
390            enum:
391              - qcom,sm8250-qmp-usb3-phy
392              - qcom,sm8350-qmp-usb3-phy
393    then:
394      properties:
395        clocks:
396          items:
397            - description: Phy aux clock.
398            - description: 19.2 MHz ref clk.
399            - description: Phy common block aux clock.
400        clock-names:
401          items:
402            - const: aux
403            - const: ref_clk_src
404            - const: com_aux
405        resets:
406          items:
407            - description: reset of phy block.
408            - description: phy common block reset.
409        reset-names:
410          items:
411            - const: phy
412            - const: common
413
414examples:
415  - |
416    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
417    usb_2_qmpphy: phy-wrapper@88eb000 {
418        compatible = "qcom,sdm845-qmp-usb3-uni-phy";
419        reg = <0x088eb000 0x18c>;
420        #clock-cells = <1>;
421        #address-cells = <1>;
422        #size-cells = <1>;
423        ranges = <0x0 0x088eb000 0x2000>;
424
425        clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
426                 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
427                 <&gcc GCC_USB3_SEC_CLKREF_CLK>,
428                 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
429        clock-names = "aux", "cfg_ahb", "ref", "com_aux";
430
431        resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
432                 <&gcc GCC_USB3_PHY_SEC_BCR>;
433        reset-names = "phy", "common";
434
435        vdda-phy-supply = <&vdda_usb2_ss_1p2>;
436        vdda-pll-supply = <&vdda_usb2_ss_core>;
437
438        usb_2_ssphy: phy@200 {
439                reg = <0x200 0x128>,
440                      <0x400 0x1fc>,
441                      <0x800 0x218>,
442                      <0x600 0x70>;
443                #clock-cells = <0>;
444                #phy-cells = <0>;
445                clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
446                clock-names = "pipe0";
447                clock-output-names = "usb3_uni_phy_pipe_clk_src";
448            };
449        };
450