xref: /freebsd/sys/contrib/device-tree/Bindings/phy/qcom,qmp-phy.yaml (revision 4d846d260e2b9a3d4d0a701462568268cbfe7a5b) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm QMP PHY controller
9
10maintainers:
11  - Vinod Koul <vkoul@kernel.org>
12
13description:
14  QMP phy controller supports physical layer functionality for a number of
15  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
16
17properties:
18  compatible:
19    enum:
20      - qcom,ipq6018-qmp-pcie-phy
21      - qcom,ipq6018-qmp-usb3-phy
22      - qcom,ipq8074-qmp-gen3-pcie-phy
23      - qcom,ipq8074-qmp-pcie-phy
24      - qcom,ipq8074-qmp-usb3-phy
25      - qcom,msm8996-qmp-pcie-phy
26      - qcom,msm8996-qmp-ufs-phy
27      - qcom,msm8996-qmp-usb3-phy
28      - qcom,msm8998-qmp-pcie-phy
29      - qcom,msm8998-qmp-ufs-phy
30      - qcom,msm8998-qmp-usb3-phy
31      - qcom,qcm2290-qmp-usb3-phy
32      - qcom,sc7180-qmp-usb3-phy
33      - qcom,sc8180x-qmp-pcie-phy
34      - qcom,sc8180x-qmp-ufs-phy
35      - qcom,sc8180x-qmp-usb3-phy
36      - qcom,sc8280xp-qmp-ufs-phy
37      - qcom,sdm845-qhp-pcie-phy
38      - qcom,sdm845-qmp-pcie-phy
39      - qcom,sdm845-qmp-ufs-phy
40      - qcom,sdm845-qmp-usb3-phy
41      - qcom,sdm845-qmp-usb3-uni-phy
42      - qcom,sm6115-qmp-ufs-phy
43      - qcom,sm6350-qmp-ufs-phy
44      - qcom,sm8150-qmp-ufs-phy
45      - qcom,sm8150-qmp-usb3-phy
46      - qcom,sm8150-qmp-usb3-uni-phy
47      - qcom,sm8250-qmp-ufs-phy
48      - qcom,sm8250-qmp-gen3x1-pcie-phy
49      - qcom,sm8250-qmp-gen3x2-pcie-phy
50      - qcom,sm8250-qmp-modem-pcie-phy
51      - qcom,sm8250-qmp-usb3-phy
52      - qcom,sm8250-qmp-usb3-uni-phy
53      - qcom,sm8350-qmp-ufs-phy
54      - qcom,sm8350-qmp-usb3-phy
55      - qcom,sm8350-qmp-usb3-uni-phy
56      - qcom,sm8450-qmp-gen3x1-pcie-phy
57      - qcom,sm8450-qmp-gen4x2-pcie-phy
58      - qcom,sm8450-qmp-ufs-phy
59      - qcom,sm8450-qmp-usb3-phy
60      - qcom,sdx55-qmp-pcie-phy
61      - qcom,sdx55-qmp-usb3-uni-phy
62      - qcom,sdx65-qmp-usb3-uni-phy
63
64  reg:
65    minItems: 1
66    items:
67      - description: Address and length of PHY's common serdes block.
68      - description: Address and length of PHY's DP_COM control block.
69
70  "#clock-cells":
71    enum: [ 1, 2 ]
72
73  "#address-cells":
74    enum: [ 1, 2 ]
75
76  "#size-cells":
77    enum: [ 1, 2 ]
78
79  ranges: true
80
81  clocks:
82    minItems: 1
83    maxItems: 4
84
85  clock-names:
86    minItems: 1
87    maxItems: 4
88
89  resets:
90    minItems: 1
91    maxItems: 3
92
93  reset-names:
94    minItems: 1
95    maxItems: 3
96
97  vdda-phy-supply:
98    description:
99      Phandle to a regulator supply to PHY core block.
100
101  vdda-pll-supply:
102    description:
103      Phandle to 1.8V regulator supply to PHY refclk pll block.
104
105  vddp-ref-clk-supply:
106    description:
107      Phandle to a regulator supply to any specific refclk pll block.
108
109#Required nodes:
110patternProperties:
111  "^phy@[0-9a-f]+$":
112    type: object
113    description:
114      Each device node of QMP phy is required to have as many child nodes as
115      the number of lanes the PHY has.
116
117required:
118  - compatible
119  - reg
120  - "#clock-cells"
121  - "#address-cells"
122  - "#size-cells"
123  - ranges
124  - clocks
125  - clock-names
126  - resets
127  - reset-names
128
129additionalProperties: false
130
131allOf:
132  - if:
133      properties:
134        compatible:
135          contains:
136            enum:
137              - qcom,sdm845-qmp-usb3-uni-phy
138    then:
139      properties:
140        clocks:
141          items:
142            - description: Phy aux clock.
143            - description: Phy config clock.
144            - description: 19.2 MHz ref clk.
145            - description: Phy common block aux clock.
146        clock-names:
147          items:
148            - const: aux
149            - const: cfg_ahb
150            - const: ref
151            - const: com_aux
152        resets:
153          items:
154            - description: reset of phy block.
155            - description: phy common block reset.
156        reset-names:
157          items:
158            - const: phy
159            - const: common
160      required:
161        - vdda-phy-supply
162        - vdda-pll-supply
163  - if:
164      properties:
165        compatible:
166          contains:
167            enum:
168              - qcom,sdx55-qmp-usb3-uni-phy
169              - qcom,sdx65-qmp-usb3-uni-phy
170    then:
171      properties:
172        clocks:
173          items:
174            - description: Phy aux clock.
175            - description: Phy config clock.
176            - description: 19.2 MHz ref clk.
177        clock-names:
178          items:
179            - const: aux
180            - const: cfg_ahb
181            - const: ref
182        resets:
183          items:
184            - description: reset of phy block.
185            - description: phy common block reset.
186        reset-names:
187          items:
188            - const: phy
189            - const: common
190      required:
191        - vdda-phy-supply
192        - vdda-pll-supply
193  - if:
194      properties:
195        compatible:
196          contains:
197            enum:
198              - qcom,msm8996-qmp-pcie-phy
199    then:
200      properties:
201        clocks:
202          items:
203            - description: Phy aux clock.
204            - description: Phy config clock.
205            - description: 19.2 MHz ref clk.
206        clock-names:
207          items:
208            - const: aux
209            - const: cfg_ahb
210            - const: ref
211        resets:
212          items:
213            - description: reset of phy block.
214            - description: phy common block reset.
215            - description: phy's ahb cfg block reset.
216        reset-names:
217          items:
218            - const: phy
219            - const: common
220            - const: cfg
221      required:
222        - vdda-phy-supply
223        - vdda-pll-supply
224  - if:
225      properties:
226        compatible:
227          contains:
228            enum:
229              - qcom,ipq8074-qmp-usb3-phy
230              - qcom,msm8996-qmp-usb3-phy
231              - qcom,msm8998-qmp-pcie-phy
232              - qcom,msm8998-qmp-usb3-phy
233    then:
234      properties:
235        clocks:
236          items:
237            - description: Phy aux clock.
238            - description: Phy config clock.
239            - description: 19.2 MHz ref clk.
240        clock-names:
241          items:
242            - const: aux
243            - const: cfg_ahb
244            - const: ref
245        resets:
246          items:
247            - description: reset of phy block.
248            - description: phy common block reset.
249        reset-names:
250          items:
251            - const: phy
252            - const: common
253      required:
254        - vdda-phy-supply
255        - vdda-pll-supply
256  - if:
257      properties:
258        compatible:
259          contains:
260            enum:
261              - qcom,msm8996-qmp-ufs-phy
262    then:
263      properties:
264        clocks:
265          items:
266            - description: 19.2 MHz ref clk.
267        clock-names:
268          items:
269            - const: ref
270        resets:
271          items:
272            - description: PHY reset in the UFS controller.
273        reset-names:
274          items:
275            - const: ufsphy
276      required:
277        - vdda-phy-supply
278        - vdda-pll-supply
279  - if:
280      properties:
281        compatible:
282          contains:
283            enum:
284              - qcom,msm8998-qmp-ufs-phy
285              - qcom,sdm845-qmp-ufs-phy
286              - qcom,sm6350-qmp-ufs-phy
287              - qcom,sm8150-qmp-ufs-phy
288              - qcom,sm8250-qmp-ufs-phy
289              - qcom,sc8180x-qmp-ufs-phy
290              - qcom,sc8280xp-qmp-ufs-phy
291    then:
292      properties:
293        clocks:
294          items:
295            - description: 19.2 MHz ref clk.
296            - description: Phy reference aux clock.
297        clock-names:
298          items:
299            - const: ref
300            - const: ref_aux
301        resets:
302          items:
303            - description: PHY reset in the UFS controller.
304        reset-names:
305          items:
306            - const: ufsphy
307      required:
308        - vdda-phy-supply
309        - vdda-pll-supply
310  - if:
311      properties:
312        compatible:
313          contains:
314            enum:
315              - qcom,ipq6018-qmp-pcie-phy
316              - qcom,ipq8074-qmp-gen3-pcie-phy
317              - qcom,ipq8074-qmp-pcie-phy
318    then:
319      properties:
320        clocks:
321          items:
322            - description: Phy aux clock.
323            - description: Phy config clock.
324        clock-names:
325          items:
326            - const: aux
327            - const: cfg_ahb
328        resets:
329          items:
330            - description: reset of phy block.
331            - description: phy common block reset.
332        reset-names:
333          items:
334            - const: phy
335            - const: common
336  - if:
337      properties:
338        compatible:
339          contains:
340            enum:
341              - qcom,sc8180x-qmp-pcie-phy
342              - qcom,sdm845-qhp-pcie-phy
343              - qcom,sdm845-qmp-pcie-phy
344              - qcom,sdx55-qmp-pcie-phy
345              - qcom,sm8250-qmp-gen3x1-pcie-phy
346              - qcom,sm8250-qmp-gen3x2-pcie-phy
347              - qcom,sm8250-qmp-modem-pcie-phy
348              - qcom,sm8450-qmp-gen3x1-pcie-phy
349              - qcom,sm8450-qmp-gen4x2-pcie-phy
350    then:
351      properties:
352        clocks:
353          items:
354            - description: Phy aux clock.
355            - description: Phy config clock.
356            - description: 19.2 MHz ref clk.
357            - description: Phy refgen clk.
358        clock-names:
359          items:
360            - const: aux
361            - const: cfg_ahb
362            - const: ref
363            - const: refgen
364        resets:
365          items:
366            - description: reset of phy block.
367        reset-names:
368          items:
369            - const: phy
370      required:
371        - vdda-phy-supply
372        - vdda-pll-supply
373  - if:
374      properties:
375        compatible:
376          contains:
377            enum:
378              - qcom,sm8150-qmp-usb3-phy
379              - qcom,sm8150-qmp-usb3-uni-phy
380              - qcom,sm8250-qmp-usb3-uni-phy
381              - qcom,sm8350-qmp-usb3-uni-phy
382    then:
383      properties:
384        clocks:
385          items:
386            - description: Phy aux clock.
387            - description: 19.2 MHz ref clk source.
388            - description: 19.2 MHz ref clk.
389            - description: Phy common block aux clock.
390        clock-names:
391          items:
392            - const: aux
393            - const: ref_clk_src
394            - const: ref
395            - const: com_aux
396        resets:
397          items:
398            - description: reset of phy block.
399            - description: phy common block reset.
400        reset-names:
401          items:
402            - const: phy
403            - const: common
404      required:
405        - vdda-phy-supply
406        - vdda-pll-supply
407  - if:
408      properties:
409        compatible:
410          contains:
411            enum:
412              - qcom,sm8250-qmp-usb3-phy
413              - qcom,sm8350-qmp-usb3-phy
414    then:
415      properties:
416        clocks:
417          items:
418            - description: Phy aux clock.
419            - description: 19.2 MHz ref clk.
420            - description: Phy common block aux clock.
421        clock-names:
422          items:
423            - const: aux
424            - const: ref_clk_src
425            - const: com_aux
426        resets:
427          items:
428            - description: reset of phy block.
429            - description: phy common block reset.
430        reset-names:
431          items:
432            - const: phy
433            - const: common
434      required:
435        - vdda-phy-supply
436        - vdda-pll-supply
437  - if:
438      properties:
439        compatible:
440          contains:
441            enum:
442              - qcom,qcm2290-qmp-usb3-phy
443    then:
444      properties:
445        clocks:
446          items:
447            - description: Phy config clock.
448            - description: 19.2 MHz ref clk.
449            - description: Phy common block aux clock.
450        clock-names:
451          items:
452            - const: cfg_ahb
453            - const: ref
454            - const: com_aux
455        resets:
456          items:
457            - description: phy_phy reset.
458            - description: reset of phy block.
459        reset-names:
460          items:
461            - const: phy_phy
462            - const: phy
463      required:
464        - vdda-phy-supply
465        - vdda-pll-supply
466
467examples:
468  - |
469    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
470    usb_2_qmpphy: phy-wrapper@88eb000 {
471        compatible = "qcom,sdm845-qmp-usb3-uni-phy";
472        reg = <0x088eb000 0x18c>;
473        #clock-cells = <1>;
474        #address-cells = <1>;
475        #size-cells = <1>;
476        ranges = <0x0 0x088eb000 0x2000>;
477
478        clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
479                 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
480                 <&gcc GCC_USB3_SEC_CLKREF_CLK>,
481                 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
482        clock-names = "aux", "cfg_ahb", "ref", "com_aux";
483
484        resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
485                 <&gcc GCC_USB3_PHY_SEC_BCR>;
486        reset-names = "phy", "common";
487
488        vdda-phy-supply = <&vdda_usb2_ss_1p2>;
489        vdda-pll-supply = <&vdda_usb2_ss_core>;
490
491        usb_2_ssphy: phy@200 {
492                reg = <0x200 0x128>,
493                      <0x400 0x1fc>,
494                      <0x800 0x218>,
495                      <0x600 0x70>;
496                #clock-cells = <0>;
497                #phy-cells = <0>;
498                clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
499                clock-names = "pipe0";
500                clock-output-names = "usb3_uni_phy_pipe_clk_src";
501            };
502        };
503