xref: /freebsd/sys/contrib/device-tree/Bindings/phy/qcom,ipq806x-usb-phy-ss.yaml (revision ec0ea6efa1ad229d75c394c1a9b9cac33af2b1d3) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-ss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm ipq806x usb DWC3 SS PHY CONTROLLER
8
9maintainers:
10  - Ansuel Smith <ansuelsmth@gmail.com>
11
12description:
13  DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
14  controllers used in ipq806x. Each DWC3 PHY controller should have its
15  own node.
16
17properties:
18  compatible:
19    const: qcom,ipq806x-usb-phy-ss
20
21  "#phy-cells":
22    const: 0
23
24  reg:
25    maxItems: 1
26
27  clocks:
28    minItems: 1
29    maxItems: 2
30
31  clock-names:
32    minItems: 1
33    maxItems: 2
34    items:
35      - const: ref
36      - const: xo
37
38  qcom,rx-eq:
39    $ref: /schemas/types.yaml#/definitions/uint32
40    description: Override value for rx_eq.
41    default: 4
42    maximum: 7
43
44  qcom,tx-deamp-3_5db:
45    $ref: /schemas/types.yaml#/definitions/uint32
46    description: Override value for transmit preemphasis.
47    default: 23
48    maximum: 63
49
50  qcom,mpll:
51    $ref: /schemas/types.yaml#/definitions/uint32
52    description: Override value for mpll.
53    default: 0
54    maximum: 7
55
56required:
57  - compatible
58  - "#phy-cells"
59  - reg
60  - clocks
61  - clock-names
62
63additionalProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
68
69    ss_phy_0: phy@110f8830 {
70      compatible = "qcom,ipq806x-usb-phy-ss";
71      reg = <0x110f8830 0x30>;
72      clocks = <&gcc USB30_0_MASTER_CLK>;
73      clock-names = "ref";
74      #phy-cells = <0>;
75    };
76