xref: /freebsd/sys/contrib/device-tree/Bindings/phy/qcom,ipq806x-usb-phy-hs.yaml (revision 994297b01b98816bea1abf45ae4bac1bc69ee7a0) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-hs.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm ipq806x usb DWC3 HS PHY CONTROLLER
8
9maintainers:
10  - Ansuel Smith <ansuelsmth@gmail.com>
11
12description:
13  DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
14  controllers used in ipq806x. Each DWC3 PHY controller should have its
15  own node.
16
17properties:
18  compatible:
19    const: qcom,ipq806x-usb-phy-hs
20
21  "#phy-cells":
22    const: 0
23
24  reg:
25    maxItems: 1
26
27  clocks:
28    minItems: 1
29    maxItems: 2
30
31  clock-names:
32    minItems: 1
33    maxItems: 2
34    items:
35      - const: ref
36      - const: xo
37
38required:
39  - compatible
40  - "#phy-cells"
41  - reg
42  - clocks
43  - clock-names
44
45additionalProperties: false
46
47examples:
48  - |
49    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
50
51    hs_phy_0: phy@110f8800 {
52      compatible = "qcom,ipq806x-usb-phy-hs";
53      reg = <0x110f8800 0x30>;
54      clocks = <&gcc USB30_0_UTMI_CLK>;
55      clock-names = "ref";
56      #phy-cells = <0>;
57    };
58