xref: /freebsd/sys/contrib/device-tree/Bindings/phy/qcom,edp-phy.yaml (revision c7046f76c2c027b00c0e6ba57cfd28f1a78f5e23) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm eDP PHY
9
10maintainers:
11  - Bjorn Andersson <bjorn.andersson@linaro.org>
12
13description:
14  The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
15  the physical interface for Embedded Display Port.
16
17properties:
18  compatible:
19    enum:
20      - qcom,sc7280-edp-phy
21      - qcom,sc8180x-edp-phy
22
23  reg:
24    items:
25      - description: PHY base register block
26      - description: tx0 register block
27      - description: tx1 register block
28      - description: PLL register block
29
30  clocks:
31    maxItems: 2
32
33  clock-names:
34    items:
35      - const: aux
36      - const: cfg_ahb
37
38  "#clock-cells":
39    const: 1
40
41  "#phy-cells":
42    const: 0
43
44required:
45  - compatible
46  - reg
47  - clocks
48  - clock-names
49  - "#clock-cells"
50  - "#phy-cells"
51
52additionalProperties: false
53
54examples:
55  - |
56    phy@aec2a00 {
57      compatible = "qcom,sc8180x-edp-phy";
58      reg = <0x0aec2a00 0x1c0>,
59            <0x0aec2200 0xa0>,
60            <0x0aec2600 0xa0>,
61            <0x0aec2000 0x19c>;
62
63      clocks = <&dispcc 0>, <&dispcc 1>;
64      clock-names = "aux", "cfg_ahb";
65
66      #clock-cells = <1>;
67      #phy-cells = <0>;
68    };
69...
70