1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Qualcomm QMP PHY controller 9 10maintainers: 11 - Vinod Koul <vkoul@kernel.org> 12 13description: 14 QMP phy controller supports physical layer functionality for a number of 15 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. 16 17properties: 18 compatible: 19 enum: 20 - qcom,ipq6018-qmp-pcie-phy 21 - qcom,ipq6018-qmp-usb3-phy 22 - qcom,ipq8074-qmp-pcie-phy 23 - qcom,ipq8074-qmp-usb3-phy 24 - qcom,msm8996-qmp-pcie-phy 25 - qcom,msm8996-qmp-ufs-phy 26 - qcom,msm8996-qmp-usb3-phy 27 - qcom,msm8998-qmp-pcie-phy 28 - qcom,msm8998-qmp-ufs-phy 29 - qcom,msm8998-qmp-usb3-phy 30 - qcom,qcm2290-qmp-usb3-phy 31 - qcom,sc7180-qmp-usb3-phy 32 - qcom,sc8180x-qmp-pcie-phy 33 - qcom,sc8180x-qmp-ufs-phy 34 - qcom,sc8180x-qmp-usb3-phy 35 - qcom,sc8280xp-qmp-ufs-phy 36 - qcom,sdm845-qhp-pcie-phy 37 - qcom,sdm845-qmp-pcie-phy 38 - qcom,sdm845-qmp-ufs-phy 39 - qcom,sdm845-qmp-usb3-phy 40 - qcom,sdm845-qmp-usb3-uni-phy 41 - qcom,sm6115-qmp-ufs-phy 42 - qcom,sm6350-qmp-ufs-phy 43 - qcom,sm8150-qmp-ufs-phy 44 - qcom,sm8150-qmp-usb3-phy 45 - qcom,sm8150-qmp-usb3-uni-phy 46 - qcom,sm8250-qmp-ufs-phy 47 - qcom,sm8250-qmp-gen3x1-pcie-phy 48 - qcom,sm8250-qmp-gen3x2-pcie-phy 49 - qcom,sm8250-qmp-modem-pcie-phy 50 - qcom,sm8250-qmp-usb3-phy 51 - qcom,sm8250-qmp-usb3-uni-phy 52 - qcom,sm8350-qmp-ufs-phy 53 - qcom,sm8350-qmp-usb3-phy 54 - qcom,sm8350-qmp-usb3-uni-phy 55 - qcom,sm8450-qmp-gen3x1-pcie-phy 56 - qcom,sm8450-qmp-gen4x2-pcie-phy 57 - qcom,sm8450-qmp-ufs-phy 58 - qcom,sm8450-qmp-usb3-phy 59 - qcom,sdx55-qmp-pcie-phy 60 - qcom,sdx55-qmp-usb3-uni-phy 61 - qcom,sdx65-qmp-usb3-uni-phy 62 63 reg: 64 minItems: 1 65 items: 66 - description: Address and length of PHY's common serdes block. 67 - description: Address and length of PHY's DP_COM control block. 68 69 "#clock-cells": 70 enum: [ 1, 2 ] 71 72 "#address-cells": 73 enum: [ 1, 2 ] 74 75 "#size-cells": 76 enum: [ 1, 2 ] 77 78 ranges: true 79 80 clocks: 81 minItems: 1 82 maxItems: 4 83 84 clock-names: 85 minItems: 1 86 maxItems: 4 87 88 resets: 89 minItems: 1 90 maxItems: 3 91 92 reset-names: 93 minItems: 1 94 maxItems: 3 95 96 vdda-phy-supply: 97 description: 98 Phandle to a regulator supply to PHY core block. 99 100 vdda-pll-supply: 101 description: 102 Phandle to 1.8V regulator supply to PHY refclk pll block. 103 104 vddp-ref-clk-supply: 105 description: 106 Phandle to a regulator supply to any specific refclk pll block. 107 108#Required nodes: 109patternProperties: 110 "^phy@[0-9a-f]+$": 111 type: object 112 description: 113 Each device node of QMP phy is required to have as many child nodes as 114 the number of lanes the PHY has. 115 116required: 117 - compatible 118 - reg 119 - "#clock-cells" 120 - "#address-cells" 121 - "#size-cells" 122 - ranges 123 - clocks 124 - clock-names 125 - resets 126 - reset-names 127 128additionalProperties: false 129 130allOf: 131 - if: 132 properties: 133 compatible: 134 contains: 135 enum: 136 - qcom,sdm845-qmp-usb3-uni-phy 137 then: 138 properties: 139 clocks: 140 items: 141 - description: Phy aux clock. 142 - description: Phy config clock. 143 - description: 19.2 MHz ref clk. 144 - description: Phy common block aux clock. 145 clock-names: 146 items: 147 - const: aux 148 - const: cfg_ahb 149 - const: ref 150 - const: com_aux 151 resets: 152 items: 153 - description: reset of phy block. 154 - description: phy common block reset. 155 reset-names: 156 items: 157 - const: phy 158 - const: common 159 required: 160 - vdda-phy-supply 161 - vdda-pll-supply 162 - if: 163 properties: 164 compatible: 165 contains: 166 enum: 167 - qcom,sdx55-qmp-usb3-uni-phy 168 - qcom,sdx65-qmp-usb3-uni-phy 169 then: 170 properties: 171 clocks: 172 items: 173 - description: Phy aux clock. 174 - description: Phy config clock. 175 - description: 19.2 MHz ref clk. 176 clock-names: 177 items: 178 - const: aux 179 - const: cfg_ahb 180 - const: ref 181 resets: 182 items: 183 - description: reset of phy block. 184 - description: phy common block reset. 185 reset-names: 186 items: 187 - const: phy 188 - const: common 189 required: 190 - vdda-phy-supply 191 - vdda-pll-supply 192 - if: 193 properties: 194 compatible: 195 contains: 196 enum: 197 - qcom,msm8996-qmp-pcie-phy 198 then: 199 properties: 200 clocks: 201 items: 202 - description: Phy aux clock. 203 - description: Phy config clock. 204 - description: 19.2 MHz ref clk. 205 clock-names: 206 items: 207 - const: aux 208 - const: cfg_ahb 209 - const: ref 210 resets: 211 items: 212 - description: reset of phy block. 213 - description: phy common block reset. 214 - description: phy's ahb cfg block reset. 215 reset-names: 216 items: 217 - const: phy 218 - const: common 219 - const: cfg 220 required: 221 - vdda-phy-supply 222 - vdda-pll-supply 223 - if: 224 properties: 225 compatible: 226 contains: 227 enum: 228 - qcom,ipq8074-qmp-usb3-phy 229 - qcom,msm8996-qmp-usb3-phy 230 - qcom,msm8998-qmp-pcie-phy 231 - qcom,msm8998-qmp-usb3-phy 232 then: 233 properties: 234 clocks: 235 items: 236 - description: Phy aux clock. 237 - description: Phy config clock. 238 - description: 19.2 MHz ref clk. 239 clock-names: 240 items: 241 - const: aux 242 - const: cfg_ahb 243 - const: ref 244 resets: 245 items: 246 - description: reset of phy block. 247 - description: phy common block reset. 248 reset-names: 249 items: 250 - const: phy 251 - const: common 252 required: 253 - vdda-phy-supply 254 - vdda-pll-supply 255 - if: 256 properties: 257 compatible: 258 contains: 259 enum: 260 - qcom,msm8996-qmp-ufs-phy 261 then: 262 properties: 263 clocks: 264 items: 265 - description: 19.2 MHz ref clk. 266 clock-names: 267 items: 268 - const: ref 269 resets: 270 items: 271 - description: PHY reset in the UFS controller. 272 reset-names: 273 items: 274 - const: ufsphy 275 required: 276 - vdda-phy-supply 277 - vdda-pll-supply 278 - if: 279 properties: 280 compatible: 281 contains: 282 enum: 283 - qcom,msm8998-qmp-ufs-phy 284 - qcom,sdm845-qmp-ufs-phy 285 - qcom,sm6350-qmp-ufs-phy 286 - qcom,sm8150-qmp-ufs-phy 287 - qcom,sm8250-qmp-ufs-phy 288 - qcom,sc8180x-qmp-ufs-phy 289 - qcom,sc8280xp-qmp-ufs-phy 290 then: 291 properties: 292 clocks: 293 items: 294 - description: 19.2 MHz ref clk. 295 - description: Phy reference aux clock. 296 clock-names: 297 items: 298 - const: ref 299 - const: ref_aux 300 resets: 301 items: 302 - description: PHY reset in the UFS controller. 303 reset-names: 304 items: 305 - const: ufsphy 306 required: 307 - vdda-phy-supply 308 - vdda-pll-supply 309 - if: 310 properties: 311 compatible: 312 contains: 313 enum: 314 - qcom,ipq6018-qmp-pcie-phy 315 - qcom,ipq8074-qmp-pcie-phy 316 then: 317 properties: 318 clocks: 319 items: 320 - description: Phy aux clock. 321 - description: Phy config clock. 322 clock-names: 323 items: 324 - const: aux 325 - const: cfg_ahb 326 resets: 327 items: 328 - description: reset of phy block. 329 - description: phy common block reset. 330 reset-names: 331 items: 332 - const: phy 333 - const: common 334 - if: 335 properties: 336 compatible: 337 contains: 338 enum: 339 - qcom,sc8180x-qmp-pcie-phy 340 - qcom,sdm845-qhp-pcie-phy 341 - qcom,sdm845-qmp-pcie-phy 342 - qcom,sdx55-qmp-pcie-phy 343 - qcom,sm8250-qmp-gen3x1-pcie-phy 344 - qcom,sm8250-qmp-gen3x2-pcie-phy 345 - qcom,sm8250-qmp-modem-pcie-phy 346 - qcom,sm8450-qmp-gen3x1-pcie-phy 347 - qcom,sm8450-qmp-gen4x2-pcie-phy 348 then: 349 properties: 350 clocks: 351 items: 352 - description: Phy aux clock. 353 - description: Phy config clock. 354 - description: 19.2 MHz ref clk. 355 - description: Phy refgen clk. 356 clock-names: 357 items: 358 - const: aux 359 - const: cfg_ahb 360 - const: ref 361 - const: refgen 362 resets: 363 items: 364 - description: reset of phy block. 365 reset-names: 366 items: 367 - const: phy 368 required: 369 - vdda-phy-supply 370 - vdda-pll-supply 371 - if: 372 properties: 373 compatible: 374 contains: 375 enum: 376 - qcom,sm8150-qmp-usb3-phy 377 - qcom,sm8150-qmp-usb3-uni-phy 378 - qcom,sm8250-qmp-usb3-uni-phy 379 - qcom,sm8350-qmp-usb3-uni-phy 380 then: 381 properties: 382 clocks: 383 items: 384 - description: Phy aux clock. 385 - description: 19.2 MHz ref clk source. 386 - description: 19.2 MHz ref clk. 387 - description: Phy common block aux clock. 388 clock-names: 389 items: 390 - const: aux 391 - const: ref_clk_src 392 - const: ref 393 - const: com_aux 394 resets: 395 items: 396 - description: reset of phy block. 397 - description: phy common block reset. 398 reset-names: 399 items: 400 - const: phy 401 - const: common 402 required: 403 - vdda-phy-supply 404 - vdda-pll-supply 405 - if: 406 properties: 407 compatible: 408 contains: 409 enum: 410 - qcom,sm8250-qmp-usb3-phy 411 - qcom,sm8350-qmp-usb3-phy 412 then: 413 properties: 414 clocks: 415 items: 416 - description: Phy aux clock. 417 - description: 19.2 MHz ref clk. 418 - description: Phy common block aux clock. 419 clock-names: 420 items: 421 - const: aux 422 - const: ref_clk_src 423 - const: com_aux 424 resets: 425 items: 426 - description: reset of phy block. 427 - description: phy common block reset. 428 reset-names: 429 items: 430 - const: phy 431 - const: common 432 required: 433 - vdda-phy-supply 434 - vdda-pll-supply 435 - if: 436 properties: 437 compatible: 438 contains: 439 enum: 440 - qcom,qcm2290-qmp-usb3-phy 441 then: 442 properties: 443 clocks: 444 items: 445 - description: Phy config clock. 446 - description: 19.2 MHz ref clk. 447 - description: Phy common block aux clock. 448 clock-names: 449 items: 450 - const: cfg_ahb 451 - const: ref 452 - const: com_aux 453 resets: 454 items: 455 - description: phy_phy reset. 456 - description: reset of phy block. 457 reset-names: 458 items: 459 - const: phy_phy 460 - const: phy 461 required: 462 - vdda-phy-supply 463 - vdda-pll-supply 464 465examples: 466 - | 467 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 468 usb_2_qmpphy: phy-wrapper@88eb000 { 469 compatible = "qcom,sdm845-qmp-usb3-uni-phy"; 470 reg = <0x088eb000 0x18c>; 471 #clock-cells = <1>; 472 #address-cells = <1>; 473 #size-cells = <1>; 474 ranges = <0x0 0x088eb000 0x2000>; 475 476 clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >, 477 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, 478 <&gcc GCC_USB3_SEC_CLKREF_CLK>, 479 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 480 clock-names = "aux", "cfg_ahb", "ref", "com_aux"; 481 482 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 483 <&gcc GCC_USB3_PHY_SEC_BCR>; 484 reset-names = "phy", "common"; 485 486 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 487 vdda-pll-supply = <&vdda_usb2_ss_core>; 488 489 usb_2_ssphy: phy@200 { 490 reg = <0x200 0x128>, 491 <0x400 0x1fc>, 492 <0x800 0x218>, 493 <0x600 0x70>; 494 #clock-cells = <0>; 495 #phy-cells = <0>; 496 clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 497 clock-names = "pipe0"; 498 clock-output-names = "usb3_uni_phy_pipe_clk_src"; 499 }; 500 }; 501