xref: /freebsd/sys/contrib/device-tree/Bindings/phy/phy-stm32-usbphyc.yaml (revision ec0ea6efa1ad229d75c394c1a9b9cac33af2b1d3) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 USB HS PHY controller binding
8
9description:
10
11  The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
12  switch. It controls PHY configuration and status, and the UTMI+ switch that
13  selects either OTG or HOST controller for the second PHY port. It also sets
14  PLL configuration.
15
16  USBPHYC
17  |_ PLL
18  |
19  |_ PHY port#1 _________________ HOST controller
20  |                   __                 |
21  |                  / 1|________________|
22  |_ PHY port#2 ----|   |________________
23  |                  \_0|                |
24  |_ UTMI switch_______|          OTG controller
25
26maintainers:
27  - Amelie Delaunay <amelie.delaunay@st.com>
28
29properties:
30  compatible:
31    const: st,stm32mp1-usbphyc
32
33  reg:
34    maxItems: 1
35
36  clocks:
37    maxItems: 1
38
39  resets:
40    maxItems: 1
41
42  "#address-cells":
43    const: 1
44
45  "#size-cells":
46    const: 0
47
48  vdda1v1-supply:
49    description: regulator providing 1V1 power supply to the PLL block
50
51  vdda1v8-supply:
52    description: regulator providing 1V8 power supply to the PLL block
53
54  '#clock-cells':
55    description: number of clock cells for ck_usbo_48m consumer
56    const: 0
57
58#Required child nodes:
59
60patternProperties:
61  "^usb-phy@[0|1]$":
62    type: object
63    description:
64      Each port the controller provides must be represented as a sub-node.
65
66    properties:
67      reg:
68        description: phy port index.
69        maxItems: 1
70
71      phy-supply:
72        description: regulator providing 3V3 power supply to the PHY.
73
74      "#phy-cells":
75        enum: [ 0x0, 0x1 ]
76
77    allOf:
78      - if:
79          properties:
80            reg:
81              const: 0
82        then:
83          properties:
84            "#phy-cells":
85              const: 0
86        else:
87          properties:
88            "#phy-cells":
89              const: 1
90              description:
91                The value is used to select UTMI switch output.
92                0 for OTG controller and 1 for Host controller.
93
94    required:
95      - reg
96      - phy-supply
97      - "#phy-cells"
98
99    additionalProperties: false
100
101required:
102  - compatible
103  - reg
104  - clocks
105  - "#address-cells"
106  - "#size-cells"
107  - vdda1v1-supply
108  - vdda1v8-supply
109  - usb-phy@0
110  - usb-phy@1
111
112additionalProperties: false
113
114examples:
115  - |
116    #include <dt-bindings/clock/stm32mp1-clks.h>
117    #include <dt-bindings/reset/stm32mp1-resets.h>
118    usbphyc: usbphyc@5a006000 {
119        compatible = "st,stm32mp1-usbphyc";
120        reg = <0x5a006000 0x1000>;
121        clocks = <&rcc USBPHY_K>;
122        resets = <&rcc USBPHY_R>;
123        vdda1v1-supply = <&reg11>;
124        vdda1v8-supply = <&reg18>;
125        #address-cells = <1>;
126        #size-cells = <0>;
127        #clock-cells = <0>;
128
129        usbphyc_port0: usb-phy@0 {
130            reg = <0>;
131            phy-supply = <&vdd_usb>;
132            #phy-cells = <0>;
133        };
134
135        usbphyc_port1: usb-phy@1 {
136            reg = <1>;
137            phy-supply = <&vdd_usb>;
138            #phy-cells = <1>;
139        };
140    };
141...
142