xref: /freebsd/sys/contrib/device-tree/Bindings/phy/phy-cadence-torrent.yaml (revision cfd6422a5217410fbd66f7a7a8a64d9d85e61229) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Cadence Torrent SD0801 PHY binding for DisplayPort
8
9description:
10  This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
11  hardware included with the Cadence MHDP DisplayPort controller.
12
13maintainers:
14  - Swapnil Jakhade <sjakhade@cadence.com>
15  - Yuti Amonkar <yamonkar@cadence.com>
16
17properties:
18  compatible:
19    enum:
20      - cdns,torrent-phy
21      - ti,j721e-serdes-10g
22
23  '#address-cells':
24    const: 1
25
26  '#size-cells':
27    const: 0
28
29  clocks:
30    maxItems: 1
31    description:
32      PHY reference clock. Must contain an entry in clock-names.
33
34  clock-names:
35    const: refclk
36
37  reg:
38    minItems: 1
39    maxItems: 2
40    items:
41      - description: Offset of the Torrent PHY configuration registers.
42      - description: Offset of the DPTX PHY configuration registers.
43
44  reg-names:
45    minItems: 1
46    maxItems: 2
47    items:
48      - const: torrent_phy
49      - const: dptx_phy
50
51  resets:
52    maxItems: 1
53    description:
54      Torrent PHY reset.
55      See Documentation/devicetree/bindings/reset/reset.txt
56
57patternProperties:
58  '^phy@[0-7]+$':
59    type: object
60    description:
61      Each group of PHY lanes with a single master lane should be represented as a sub-node.
62    properties:
63      reg:
64        description:
65          The master lane number. This is the lowest numbered lane in the lane group.
66
67      resets:
68        minItems: 1
69        maxItems: 4
70        description:
71          Contains list of resets, one per lane, to get all the link lanes out of reset.
72
73      "#phy-cells":
74        const: 0
75
76      cdns,phy-type:
77        description:
78          Specifies the type of PHY for which the group of PHY lanes is used.
79          Refer include/dt-bindings/phy/phy.h. Constants from the header should be used.
80        $ref: /schemas/types.yaml#/definitions/uint32
81        enum: [1, 2, 3, 4, 5, 6]
82
83      cdns,num-lanes:
84        description:
85          Number of DisplayPort lanes.
86        $ref: /schemas/types.yaml#/definitions/uint32
87        enum: [1, 2, 4]
88        default: 4
89
90      cdns,max-bit-rate:
91        description:
92          Maximum DisplayPort link bit rate to use, in Mbps
93        $ref: /schemas/types.yaml#/definitions/uint32
94        enum: [2160, 2430, 2700, 3240, 4320, 5400, 8100]
95        default: 8100
96
97    required:
98      - reg
99      - resets
100      - "#phy-cells"
101      - cdns,phy-type
102
103    additionalProperties: false
104
105required:
106  - compatible
107  - "#address-cells"
108  - "#size-cells"
109  - clocks
110  - clock-names
111  - reg
112  - reg-names
113  - resets
114
115additionalProperties: false
116
117examples:
118  - |
119    #include <dt-bindings/phy/phy.h>
120
121    bus {
122        #address-cells = <2>;
123        #size-cells = <2>;
124
125        torrent-phy@f0fb500000 {
126            compatible = "cdns,torrent-phy";
127            reg = <0xf0 0xfb500000 0x0 0x00100000>,
128                  <0xf0 0xfb030a00 0x0 0x00000040>;
129            reg-names = "torrent_phy", "dptx_phy";
130            resets = <&phyrst 0>;
131            clocks = <&ref_clk>;
132            clock-names = "refclk";
133            #address-cells = <1>;
134            #size-cells = <0>;
135            phy@0 {
136                      reg = <0>;
137                      resets = <&phyrst 1>, <&phyrst 2>,
138                               <&phyrst 3>, <&phyrst 4>;
139                      #phy-cells = <0>;
140                      cdns,phy-type = <PHY_TYPE_DP>;
141                      cdns,num-lanes = <4>;
142                      cdns,max-bit-rate = <8100>;
143            };
144        };
145    };
146...
147