1Mixel DSI PHY for i.MX8 2 3The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the 4MIPI-DSI IP from Northwest Logic). It represents the physical layer for the 5electrical signals for DSI. 6 7Required properties: 8- compatible: Must be: 9 - "fsl,imx8mq-mipi-dphy" 10- clocks: Must contain an entry for each entry in clock-names. 11- clock-names: Must contain the following entries: 12 - "phy_ref": phandle and specifier referring to the DPHY ref clock 13- reg: the register range of the PHY controller 14- #phy-cells: number of cells in PHY, as defined in 15 Documentation/devicetree/bindings/phy/phy-bindings.txt 16 this must be <0> 17 18Optional properties: 19- power-domains: phandle to power domain 20 21Example: 22 dphy: dphy@30a0030 { 23 compatible = "fsl,imx8mq-mipi-dphy"; 24 clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; 25 clock-names = "phy_ref"; 26 reg = <0x30a00300 0x100>; 27 power-domains = <&pd_mipi0>; 28 #phy-cells = <0>; 29 }; 30