1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (c) 2020 MediaTek 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: MediaTek MIPI Display Serial Interface (DSI) PHY 9 10maintainers: 11 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 12 - Philipp Zabel <p.zabel@pengutronix.de> 13 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 15description: The MIPI DSI PHY supports up to 4-lane output. 16 17properties: 18 $nodename: 19 pattern: "^dsi-phy@[0-9a-f]+$" 20 21 compatible: 22 oneOf: 23 - items: 24 - enum: 25 - mediatek,mt7623-mipi-tx 26 - const: mediatek,mt2701-mipi-tx 27 - items: 28 - enum: 29 - mediatek,mt6795-mipi-tx 30 - const: mediatek,mt8173-mipi-tx 31 - items: 32 - enum: 33 - mediatek,mt8188-mipi-tx 34 - mediatek,mt8195-mipi-tx 35 - mediatek,mt8365-mipi-tx 36 - const: mediatek,mt8183-mipi-tx 37 - const: mediatek,mt2701-mipi-tx 38 - const: mediatek,mt8173-mipi-tx 39 - const: mediatek,mt8183-mipi-tx 40 41 reg: 42 maxItems: 1 43 44 clocks: 45 items: 46 - description: PLL reference clock 47 48 clock-output-names: 49 maxItems: 1 50 51 "#phy-cells": 52 const: 0 53 54 "#clock-cells": 55 const: 0 56 57 nvmem-cells: 58 maxItems: 1 59 description: A phandle to the calibration data provided by a nvmem device, 60 if unspecified, default values shall be used. 61 62 nvmem-cell-names: 63 items: 64 - const: calibration-data 65 66 drive-strength-microamp: 67 description: adjust driving current 68 multipleOf: 200 69 minimum: 2000 70 maximum: 6000 71 default: 4600 72 73required: 74 - compatible 75 - reg 76 - clocks 77 - clock-output-names 78 - "#phy-cells" 79 - "#clock-cells" 80 81additionalProperties: false 82 83examples: 84 - | 85 #include <dt-bindings/clock/mt8173-clk.h> 86 dsi-phy@10215000 { 87 compatible = "mediatek,mt8173-mipi-tx"; 88 reg = <0x10215000 0x1000>; 89 clocks = <&clk26m>; 90 clock-output-names = "mipi_tx0_pll"; 91 drive-strength-microamp = <4000>; 92 nvmem-cells = <&mipi_tx_calibration>; 93 nvmem-cell-names = "calibration-data"; 94 #clock-cells = <0>; 95 #phy-cells = <0>; 96 }; 97 98... 99