xref: /freebsd/sys/contrib/device-tree/Bindings/phy/allwinner,suniv-f1c100s-usb-phy.yaml (revision 5ca8e32633c4ffbbcd6762e5888b6a4ba0708c6c) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/allwinner,suniv-f1c100s-usb-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner F1C100s USB PHY
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  "#phy-cells":
15    const: 1
16
17  compatible:
18    const: allwinner,suniv-f1c100s-usb-phy
19
20  reg:
21    maxItems: 1
22    description: PHY Control registers
23
24  reg-names:
25    const: phy_ctrl
26
27  clocks:
28    maxItems: 1
29    description: USB OTG PHY bus clock
30
31  clock-names:
32    const: usb0_phy
33
34  resets:
35    maxItems: 1
36    description: USB OTG reset
37
38  reset-names:
39    const: usb0_reset
40
41  usb0_id_det-gpios:
42    maxItems: 1
43    description: GPIO to the USB OTG ID pin
44
45  usb0_vbus_det-gpios:
46    maxItems: 1
47    description: GPIO to the USB OTG VBUS detect pin
48
49  usb0_vbus_power-supply:
50    description: Power supply to detect the USB OTG VBUS
51
52  usb0_vbus-supply:
53    description: Regulator controlling USB OTG VBUS
54
55required:
56  - "#phy-cells"
57  - compatible
58  - clocks
59  - clock-names
60  - reg
61  - reg-names
62  - resets
63  - reset-names
64
65additionalProperties: false
66
67examples:
68  - |
69    #include <dt-bindings/gpio/gpio.h>
70    #include <dt-bindings/clock/suniv-ccu-f1c100s.h>
71    #include <dt-bindings/reset/suniv-ccu-f1c100s.h>
72
73    phy@1c13400 {
74        compatible = "allwinner,suniv-f1c100s-usb-phy";
75        reg = <0x01c13400 0x10>;
76        reg-names = "phy_ctrl";
77        clocks = <&ccu CLK_USB_PHY0>;
78        clock-names = "usb0_phy";
79        resets = <&ccu RST_USB_PHY0>;
80        reset-names = "usb0_reset";
81        #phy-cells = <1>;
82        usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>;
83    };
84