xref: /freebsd/sys/contrib/device-tree/Bindings/phy/allwinner,sun8i-h3-usb-phy.yaml (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner H3 USB PHY Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  "#phy-cells":
15    const: 1
16
17  compatible:
18    const: allwinner,sun8i-h3-usb-phy
19
20  reg:
21    items:
22      - description: PHY Control registers
23      - description: PHY PMU0 registers
24      - description: PHY PMU1 registers
25      - description: PHY PMU2 registers
26      - description: PHY PMU3 registers
27
28  reg-names:
29    items:
30      - const: phy_ctrl
31      - const: pmu0
32      - const: pmu1
33      - const: pmu2
34      - const: pmu3
35
36  clocks:
37    items:
38      - description: USB OTG PHY bus clock
39      - description: USB Host 0 PHY bus clock
40      - description: USB Host 1 PHY bus clock
41      - description: USB Host 2 PHY bus clock
42
43  clock-names:
44    items:
45      - const: usb0_phy
46      - const: usb1_phy
47      - const: usb2_phy
48      - const: usb3_phy
49
50  resets:
51    items:
52      - description: USB OTG reset
53      - description: USB Host 1 Controller reset
54      - description: USB Host 2 Controller reset
55      - description: USB Host 3 Controller reset
56
57  reset-names:
58    items:
59      - const: usb0_reset
60      - const: usb1_reset
61      - const: usb2_reset
62      - const: usb3_reset
63
64  usb0_id_det-gpios:
65    description: GPIO to the USB OTG ID pin
66
67  usb0_vbus_det-gpios:
68    description: GPIO to the USB OTG VBUS detect pin
69
70  usb0_vbus_power-supply:
71    description: Power supply to detect the USB OTG VBUS
72
73  usb0_vbus-supply:
74    description: Regulator controlling USB OTG VBUS
75
76  usb1_vbus-supply:
77    description: Regulator controlling USB1 Host controller
78
79  usb2_vbus-supply:
80    description: Regulator controlling USB2 Host controller
81
82  usb3_vbus-supply:
83    description: Regulator controlling USB3 Host controller
84
85required:
86  - "#phy-cells"
87  - compatible
88  - clocks
89  - clock-names
90  - reg
91  - reg-names
92  - resets
93  - reset-names
94
95additionalProperties: false
96
97examples:
98  - |
99    #include <dt-bindings/gpio/gpio.h>
100    #include <dt-bindings/clock/sun8i-h3-ccu.h>
101    #include <dt-bindings/reset/sun8i-h3-ccu.h>
102
103    phy@1c19400 {
104        #phy-cells = <1>;
105        compatible = "allwinner,sun8i-h3-usb-phy";
106        reg = <0x01c19400 0x2c>,
107              <0x01c1a800 0x4>,
108              <0x01c1b800 0x4>,
109              <0x01c1c800 0x4>,
110              <0x01c1d800 0x4>;
111        reg-names = "phy_ctrl",
112                    "pmu0",
113                    "pmu1",
114                    "pmu2",
115                    "pmu3";
116        clocks = <&ccu CLK_USB_PHY0>,
117                 <&ccu CLK_USB_PHY1>,
118                 <&ccu CLK_USB_PHY2>,
119                 <&ccu CLK_USB_PHY3>;
120        clock-names = "usb0_phy",
121                      "usb1_phy",
122                      "usb2_phy",
123                      "usb3_phy";
124        resets = <&ccu RST_USB_PHY0>,
125                 <&ccu RST_USB_PHY1>,
126                 <&ccu RST_USB_PHY2>,
127                 <&ccu RST_USB_PHY3>;
128        reset-names = "usb0_reset",
129                      "usb1_reset",
130                      "usb2_reset",
131                      "usb3_reset";
132        usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
133        usb0_vbus-supply = <&reg_usb0_vbus>;
134        usb1_vbus-supply = <&reg_usb1_vbus>;
135        usb2_vbus-supply = <&reg_usb2_vbus>;
136        usb3_vbus-supply = <&reg_usb3_vbus>;
137    };
138