xref: /freebsd/sys/contrib/device-tree/Bindings/phy/allwinner,sun8i-h3-usb-phy.yaml (revision 5def4c47d4bd90b209b9b4a4ba9faec15846d8fd) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner H3 USB PHY Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  "#phy-cells":
15    const: 1
16
17  compatible:
18    const: allwinner,sun8i-h3-usb-phy
19
20  reg:
21    items:
22      - description: PHY Control registers
23      - description: PHY PMU0 registers
24      - description: PHY PMU1 registers
25      - description: PHY PMU2 registers
26      - description: PHY PMU3 registers
27
28  reg-names:
29    items:
30      - const: phy_ctrl
31      - const: pmu0
32      - const: pmu1
33      - const: pmu2
34      - const: pmu3
35
36  clocks:
37    items:
38      - description: USB OTG PHY bus clock
39      - description: USB Host 0 PHY bus clock
40      - description: USB Host 1 PHY bus clock
41      - description: USB Host 2 PHY bus clock
42
43  clock-names:
44    items:
45      - const: usb0_phy
46      - const: usb1_phy
47      - const: usb2_phy
48      - const: usb3_phy
49
50  resets:
51    items:
52      - description: USB OTG reset
53      - description: USB Host 1 Controller reset
54      - description: USB Host 2 Controller reset
55      - description: USB Host 3 Controller reset
56
57  reset-names:
58    items:
59      - const: usb0_reset
60      - const: usb1_reset
61      - const: usb2_reset
62      - const: usb3_reset
63
64  usb0_id_det-gpios:
65    maxItems: 1
66    description: GPIO to the USB OTG ID pin
67
68  usb0_vbus_det-gpios:
69    maxItems: 1
70    description: GPIO to the USB OTG VBUS detect pin
71
72  usb0_vbus_power-supply:
73    description: Power supply to detect the USB OTG VBUS
74
75  usb0_vbus-supply:
76    description: Regulator controlling USB OTG VBUS
77
78  usb1_vbus-supply:
79    description: Regulator controlling USB1 Host controller
80
81  usb2_vbus-supply:
82    description: Regulator controlling USB2 Host controller
83
84  usb3_vbus-supply:
85    description: Regulator controlling USB3 Host controller
86
87required:
88  - "#phy-cells"
89  - compatible
90  - clocks
91  - clock-names
92  - reg
93  - reg-names
94  - resets
95  - reset-names
96
97additionalProperties: false
98
99examples:
100  - |
101    #include <dt-bindings/gpio/gpio.h>
102    #include <dt-bindings/clock/sun8i-h3-ccu.h>
103    #include <dt-bindings/reset/sun8i-h3-ccu.h>
104
105    phy@1c19400 {
106        #phy-cells = <1>;
107        compatible = "allwinner,sun8i-h3-usb-phy";
108        reg = <0x01c19400 0x2c>,
109              <0x01c1a800 0x4>,
110              <0x01c1b800 0x4>,
111              <0x01c1c800 0x4>,
112              <0x01c1d800 0x4>;
113        reg-names = "phy_ctrl",
114                    "pmu0",
115                    "pmu1",
116                    "pmu2",
117                    "pmu3";
118        clocks = <&ccu CLK_USB_PHY0>,
119                 <&ccu CLK_USB_PHY1>,
120                 <&ccu CLK_USB_PHY2>,
121                 <&ccu CLK_USB_PHY3>;
122        clock-names = "usb0_phy",
123                      "usb1_phy",
124                      "usb2_phy",
125                      "usb3_phy";
126        resets = <&ccu RST_USB_PHY0>,
127                 <&ccu RST_USB_PHY1>,
128                 <&ccu RST_USB_PHY2>,
129                 <&ccu RST_USB_PHY3>;
130        reset-names = "usb0_reset",
131                      "usb1_reset",
132                      "usb2_reset",
133                      "usb3_reset";
134        usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
135        usb0_vbus-supply = <&reg_usb0_vbus>;
136        usb1_vbus-supply = <&reg_usb1_vbus>;
137        usb2_vbus-supply = <&reg_usb2_vbus>;
138        usb3_vbus-supply = <&reg_usb3_vbus>;
139    };
140