xref: /freebsd/sys/contrib/device-tree/Bindings/pci/socionext,uniphier-pcie-ep.yaml (revision d5b0e70f7e04d971691517ce1304d86a1e367e2e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie-ep.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier PCIe endpoint controller
8
9description: |
10  UniPhier PCIe endpoint controller is based on the Synopsys DesignWare
11  PCI core. It shares common features with the PCIe DesignWare core and
12  inherits common properties defined in
13  Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml.
14
15maintainers:
16  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
17
18allOf:
19  - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
20
21properties:
22  compatible:
23    enum:
24      - socionext,uniphier-pro5-pcie-ep
25      - socionext,uniphier-nx1-pcie-ep
26
27  reg:
28    minItems: 4
29    maxItems: 5
30
31  reg-names:
32    oneOf:
33      - items:
34          - const: dbi
35          - const: dbi2
36          - const: link
37          - const: addr_space
38      - items:
39          - const: dbi
40          - const: dbi2
41          - const: link
42          - const: addr_space
43          - const: atu
44
45  clocks:
46    minItems: 1
47    maxItems: 2
48
49  clock-names:
50    oneOf:
51      - items:              # for Pro5
52          - const: gio
53          - const: link
54      - const: link         # for NX1
55
56  resets:
57    minItems: 1
58    maxItems: 2
59
60  reset-names:
61    oneOf:
62      - items:              # for Pro5
63          - const: gio
64          - const: link
65      - const: link         # for NX1
66
67  num-ib-windows:
68    const: 16
69
70  num-ob-windows:
71    const: 16
72
73  num-lanes: true
74
75  phys:
76    maxItems: 1
77
78  phy-names:
79    const: pcie-phy
80
81required:
82  - compatible
83  - reg
84  - reg-names
85  - clocks
86  - clock-names
87  - resets
88  - reset-names
89
90unevaluatedProperties: false
91
92examples:
93  - |
94    pcie_ep: pcie-ep@66000000 {
95        compatible = "socionext,uniphier-pro5-pcie-ep";
96        reg-names = "dbi", "dbi2", "link", "addr_space";
97        reg = <0x66000000 0x1000>, <0x66001000 0x1000>,
98              <0x66010000 0x10000>, <0x67000000 0x400000>;
99        clock-names = "gio", "link";
100        clocks = <&sys_clk 12>, <&sys_clk 24>;
101        reset-names = "gio", "link";
102        resets = <&sys_rst 12>, <&sys_rst 24>;
103        num-ib-windows = <16>;
104        num-ob-windows = <16>;
105        num-lanes = <4>;
106        phy-names = "pcie-phy";
107        phys = <&pcie_phy>;
108    };
109