xref: /freebsd/sys/contrib/device-tree/Bindings/pci/snps,dw-pcie-ep.yaml (revision e67e85659c0de33e617e5fbf1028c6e8b49eee53) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare PCIe endpoint interface
8
9maintainers:
10  - Jingoo Han <jingoohan1@gmail.com>
11  - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
12
13description: |
14  Synopsys DesignWare PCIe host controller endpoint
15
16allOf:
17  - $ref: /schemas/pci/pci-ep.yaml#
18
19properties:
20  compatible:
21    anyOf:
22      - {}
23      - const: snps,dw-pcie-ep
24
25  reg:
26    description: |
27      It should contain Data Bus Interface (dbi) and config registers for all
28      versions.
29      For designware core version >= 4.80, it may contain ATU address space.
30    minItems: 2
31    maxItems: 4
32
33  reg-names:
34    minItems: 2
35    maxItems: 4
36    items:
37      enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]
38
39  reset-gpio:
40    description: GPIO pin number of PERST# signal
41    maxItems: 1
42    deprecated: true
43
44  reset-gpios:
45    description: GPIO controlled connection to PERST# signal
46    maxItems: 1
47
48  snps,enable-cdm-check:
49    type: boolean
50    description: |
51      This is a boolean property and if present enables
52      automatic checking of CDM (Configuration Dependent Module) registers
53      for data corruption. CDM registers include standard PCIe configuration
54      space registers, Port Logic registers, DMA and iATU (internal Address
55      Translation Unit) registers.
56
57  num-ib-windows:
58    description: number of inbound address translation windows
59    maxItems: 1
60    deprecated: true
61
62  num-ob-windows:
63    description: number of outbound address translation windows
64    maxItems: 1
65    deprecated: true
66
67required:
68  - reg
69  - reg-names
70  - compatible
71
72additionalProperties: true
73
74examples:
75  - |
76    bus {
77      #address-cells = <1>;
78      #size-cells = <1>;
79      pcie-ep@dfd00000 {
80        compatible = "snps,dw-pcie-ep";
81        reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
82              <0xdfc01000 0x0001000>, /* IP registers 2 */
83              <0xd0000000 0x2000000>; /* Configuration space */
84        reg-names = "dbi", "dbi2", "addr_space";
85      };
86    };
87