1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 12 13description: | 14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 25 - qcom,pcie-ipq8064 26 - qcom,pcie-ipq8064-v2 27 - qcom,pcie-ipq8074 28 - qcom,pcie-ipq8074-gen3 29 - qcom,pcie-msm8996 30 - qcom,pcie-qcs404 31 - qcom,pcie-sa8540p 32 - qcom,pcie-sc7280 33 - qcom,pcie-sc8180x 34 - qcom,pcie-sc8280xp 35 - qcom,pcie-sdm845 36 - qcom,pcie-sdx55 37 - qcom,pcie-sm8150 38 - qcom,pcie-sm8250 39 - qcom,pcie-sm8350 40 - qcom,pcie-sm8450-pcie0 41 - qcom,pcie-sm8450-pcie1 42 - qcom,pcie-sm8550 43 - items: 44 - const: qcom,pcie-msm8998 45 - const: qcom,pcie-msm8996 46 47 reg: 48 minItems: 4 49 maxItems: 6 50 51 reg-names: 52 minItems: 4 53 maxItems: 6 54 55 interrupts: 56 minItems: 1 57 maxItems: 8 58 59 interrupt-names: 60 minItems: 1 61 maxItems: 8 62 63 iommu-map: 64 maxItems: 2 65 66 # Common definitions for clocks, clock-names and reset. 67 # Platform constraints are described later. 68 clocks: 69 minItems: 3 70 maxItems: 13 71 72 clock-names: 73 minItems: 3 74 maxItems: 13 75 76 dma-coherent: true 77 78 interconnects: 79 maxItems: 2 80 81 interconnect-names: 82 items: 83 - const: pcie-mem 84 - const: cpu-pcie 85 86 resets: 87 minItems: 1 88 maxItems: 12 89 90 resets-names: 91 minItems: 1 92 maxItems: 12 93 94 vdda-supply: 95 description: A phandle to the core analog power supply 96 97 vdda_phy-supply: 98 description: A phandle to the core analog power supply for PHY 99 100 vdda_refclk-supply: 101 description: A phandle to the core analog power supply for IC which generates reference clock 102 103 vddpe-3v3-supply: 104 description: A phandle to the PCIe endpoint power supply 105 106 phys: 107 maxItems: 1 108 109 phy-names: 110 items: 111 - const: pciephy 112 113 power-domains: 114 maxItems: 1 115 116 perst-gpios: 117 description: GPIO controlled connection to PERST# signal 118 maxItems: 1 119 120 wake-gpios: 121 description: GPIO controlled connection to WAKE# signal 122 maxItems: 1 123 124required: 125 - compatible 126 - reg 127 - reg-names 128 - interrupt-map-mask 129 - interrupt-map 130 - clocks 131 - clock-names 132 133anyOf: 134 - required: 135 - interrupts 136 - interrupt-names 137 - "#interrupt-cells" 138 - required: 139 - msi-map 140 - msi-map-mask 141 142allOf: 143 - $ref: /schemas/pci/pci-bus.yaml# 144 - if: 145 properties: 146 compatible: 147 contains: 148 enum: 149 - qcom,pcie-apq8064 150 - qcom,pcie-ipq4019 151 - qcom,pcie-ipq8064 152 - qcom,pcie-ipq8064v2 153 - qcom,pcie-ipq8074 154 - qcom,pcie-qcs404 155 then: 156 properties: 157 reg: 158 minItems: 4 159 maxItems: 4 160 reg-names: 161 items: 162 - const: dbi # DesignWare PCIe registers 163 - const: elbi # External local bus interface registers 164 - const: parf # Qualcomm specific registers 165 - const: config # PCIe configuration space 166 167 - if: 168 properties: 169 compatible: 170 contains: 171 enum: 172 - qcom,pcie-ipq6018 173 - qcom,pcie-ipq8074-gen3 174 then: 175 properties: 176 reg: 177 minItems: 5 178 maxItems: 5 179 reg-names: 180 items: 181 - const: dbi # DesignWare PCIe registers 182 - const: elbi # External local bus interface registers 183 - const: atu # ATU address space 184 - const: parf # Qualcomm specific registers 185 - const: config # PCIe configuration space 186 187 - if: 188 properties: 189 compatible: 190 contains: 191 enum: 192 - qcom,pcie-apq8084 193 - qcom,pcie-msm8996 194 - qcom,pcie-sdm845 195 then: 196 properties: 197 reg: 198 minItems: 4 199 maxItems: 5 200 reg-names: 201 minItems: 4 202 items: 203 - const: parf # Qualcomm specific registers 204 - const: dbi # DesignWare PCIe registers 205 - const: elbi # External local bus interface registers 206 - const: config # PCIe configuration space 207 - const: mhi # MHI registers 208 209 - if: 210 properties: 211 compatible: 212 contains: 213 enum: 214 - qcom,pcie-sc7280 215 - qcom,pcie-sc8180x 216 - qcom,pcie-sc8280xp 217 - qcom,pcie-sdx55 218 - qcom,pcie-sm8250 219 - qcom,pcie-sm8350 220 - qcom,pcie-sm8450-pcie0 221 - qcom,pcie-sm8450-pcie1 222 - qcom,pcie-sm8550 223 then: 224 properties: 225 reg: 226 minItems: 5 227 maxItems: 6 228 reg-names: 229 minItems: 5 230 items: 231 - const: parf # Qualcomm specific registers 232 - const: dbi # DesignWare PCIe registers 233 - const: elbi # External local bus interface registers 234 - const: atu # ATU address space 235 - const: config # PCIe configuration space 236 - const: mhi # MHI registers 237 238 - if: 239 properties: 240 compatible: 241 contains: 242 enum: 243 - qcom,pcie-apq8064 244 - qcom,pcie-ipq8064 245 - qcom,pcie-ipq8064v2 246 then: 247 properties: 248 clocks: 249 minItems: 3 250 maxItems: 5 251 clock-names: 252 minItems: 3 253 items: 254 - const: core # Clocks the pcie hw block 255 - const: iface # Configuration AHB clock 256 - const: phy # Clocks the pcie PHY block 257 - const: aux # Clocks the pcie AUX block, not on apq8064 258 - const: ref # Clocks the pcie ref block, not on apq8064 259 resets: 260 minItems: 5 261 maxItems: 6 262 reset-names: 263 minItems: 5 264 items: 265 - const: axi # AXI reset 266 - const: ahb # AHB reset 267 - const: por # POR reset 268 - const: pci # PCI reset 269 - const: phy # PHY reset 270 - const: ext # EXT reset, not on apq8064 271 required: 272 - vdda-supply 273 - vdda_phy-supply 274 - vdda_refclk-supply 275 276 - if: 277 properties: 278 compatible: 279 contains: 280 enum: 281 - qcom,pcie-apq8084 282 then: 283 properties: 284 clocks: 285 minItems: 4 286 maxItems: 4 287 clock-names: 288 items: 289 - const: iface # Configuration AHB clock 290 - const: master_bus # Master AXI clock 291 - const: slave_bus # Slave AXI clock 292 - const: aux # Auxiliary (AUX) clock 293 resets: 294 maxItems: 1 295 reset-names: 296 items: 297 - const: core # Core reset 298 299 - if: 300 properties: 301 compatible: 302 contains: 303 enum: 304 - qcom,pcie-ipq4019 305 then: 306 properties: 307 clocks: 308 minItems: 3 309 maxItems: 3 310 clock-names: 311 items: 312 - const: aux # Auxiliary (AUX) clock 313 - const: master_bus # Master AXI clock 314 - const: slave_bus # Slave AXI clock 315 resets: 316 minItems: 12 317 maxItems: 12 318 reset-names: 319 items: 320 - const: axi_m # AXI master reset 321 - const: axi_s # AXI slave reset 322 - const: pipe # PIPE reset 323 - const: axi_m_vmid # VMID reset 324 - const: axi_s_xpu # XPU reset 325 - const: parf # PARF reset 326 - const: phy # PHY reset 327 - const: axi_m_sticky # AXI sticky reset 328 - const: pipe_sticky # PIPE sticky reset 329 - const: pwr # PWR reset 330 - const: ahb # AHB reset 331 - const: phy_ahb # PHY AHB reset 332 333 - if: 334 properties: 335 compatible: 336 contains: 337 enum: 338 - qcom,pcie-msm8996 339 then: 340 properties: 341 clocks: 342 minItems: 5 343 maxItems: 5 344 clock-names: 345 items: 346 - const: pipe # Pipe Clock driving internal logic 347 - const: aux # Auxiliary (AUX) clock 348 - const: cfg # Configuration clock 349 - const: bus_master # Master AXI clock 350 - const: bus_slave # Slave AXI clock 351 resets: false 352 reset-names: false 353 354 - if: 355 properties: 356 compatible: 357 contains: 358 enum: 359 - qcom,pcie-ipq8074 360 then: 361 properties: 362 clocks: 363 minItems: 5 364 maxItems: 5 365 clock-names: 366 items: 367 - const: iface # PCIe to SysNOC BIU clock 368 - const: axi_m # AXI Master clock 369 - const: axi_s # AXI Slave clock 370 - const: ahb # AHB clock 371 - const: aux # Auxiliary clock 372 resets: 373 minItems: 7 374 maxItems: 7 375 reset-names: 376 items: 377 - const: pipe # PIPE reset 378 - const: sleep # Sleep reset 379 - const: sticky # Core Sticky reset 380 - const: axi_m # AXI Master reset 381 - const: axi_s # AXI Slave reset 382 - const: ahb # AHB Reset 383 - const: axi_m_sticky # AXI Master Sticky reset 384 385 - if: 386 properties: 387 compatible: 388 contains: 389 enum: 390 - qcom,pcie-ipq6018 391 - qcom,pcie-ipq8074-gen3 392 then: 393 properties: 394 clocks: 395 minItems: 5 396 maxItems: 5 397 clock-names: 398 items: 399 - const: iface # PCIe to SysNOC BIU clock 400 - const: axi_m # AXI Master clock 401 - const: axi_s # AXI Slave clock 402 - const: axi_bridge # AXI bridge clock 403 - const: rchng 404 resets: 405 minItems: 8 406 maxItems: 8 407 reset-names: 408 items: 409 - const: pipe # PIPE reset 410 - const: sleep # Sleep reset 411 - const: sticky # Core Sticky reset 412 - const: axi_m # AXI Master reset 413 - const: axi_s # AXI Slave reset 414 - const: ahb # AHB Reset 415 - const: axi_m_sticky # AXI Master Sticky reset 416 - const: axi_s_sticky # AXI Slave Sticky reset 417 418 - if: 419 properties: 420 compatible: 421 contains: 422 enum: 423 - qcom,pcie-qcs404 424 then: 425 properties: 426 clocks: 427 minItems: 4 428 maxItems: 4 429 clock-names: 430 items: 431 - const: iface # AHB clock 432 - const: aux # Auxiliary clock 433 - const: master_bus # AXI Master clock 434 - const: slave_bus # AXI Slave clock 435 resets: 436 minItems: 6 437 maxItems: 6 438 reset-names: 439 items: 440 - const: axi_m # AXI Master reset 441 - const: axi_s # AXI Slave reset 442 - const: axi_m_sticky # AXI Master Sticky reset 443 - const: pipe_sticky # PIPE sticky reset 444 - const: pwr # PWR reset 445 - const: ahb # AHB reset 446 447 - if: 448 properties: 449 compatible: 450 contains: 451 enum: 452 - qcom,pcie-sc7280 453 then: 454 properties: 455 clocks: 456 minItems: 13 457 maxItems: 13 458 clock-names: 459 items: 460 - const: pipe # PIPE clock 461 - const: pipe_mux # PIPE MUX 462 - const: phy_pipe # PIPE output clock 463 - const: ref # REFERENCE clock 464 - const: aux # Auxiliary clock 465 - const: cfg # Configuration clock 466 - const: bus_master # Master AXI clock 467 - const: bus_slave # Slave AXI clock 468 - const: slave_q2a # Slave Q2A clock 469 - const: tbu # PCIe TBU clock 470 - const: ddrss_sf_tbu # PCIe SF TBU clock 471 - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock 472 - const: aggre1 # Aggre NoC PCIe1 AXI clock 473 resets: 474 maxItems: 1 475 reset-names: 476 items: 477 - const: pci # PCIe core reset 478 479 - if: 480 properties: 481 compatible: 482 contains: 483 enum: 484 - qcom,pcie-sdm845 485 then: 486 oneOf: 487 # Unfortunately the "optional" ref clock is used in the middle of the list 488 - properties: 489 clocks: 490 minItems: 8 491 maxItems: 8 492 clock-names: 493 items: 494 - const: pipe # PIPE clock 495 - const: aux # Auxiliary clock 496 - const: cfg # Configuration clock 497 - const: bus_master # Master AXI clock 498 - const: bus_slave # Slave AXI clock 499 - const: slave_q2a # Slave Q2A clock 500 - const: ref # REFERENCE clock 501 - const: tbu # PCIe TBU clock 502 - properties: 503 clocks: 504 minItems: 7 505 maxItems: 7 506 clock-names: 507 items: 508 - const: pipe # PIPE clock 509 - const: aux # Auxiliary clock 510 - const: cfg # Configuration clock 511 - const: bus_master # Master AXI clock 512 - const: bus_slave # Slave AXI clock 513 - const: slave_q2a # Slave Q2A clock 514 - const: tbu # PCIe TBU clock 515 properties: 516 resets: 517 maxItems: 1 518 reset-names: 519 items: 520 - const: pci # PCIe core reset 521 522 - if: 523 properties: 524 compatible: 525 contains: 526 enum: 527 - qcom,pcie-sc8180x 528 - qcom,pcie-sm8150 529 - qcom,pcie-sm8250 530 then: 531 oneOf: 532 # Unfortunately the "optional" ref clock is used in the middle of the list 533 - properties: 534 clocks: 535 minItems: 9 536 maxItems: 9 537 clock-names: 538 items: 539 - const: pipe # PIPE clock 540 - const: aux # Auxiliary clock 541 - const: cfg # Configuration clock 542 - const: bus_master # Master AXI clock 543 - const: bus_slave # Slave AXI clock 544 - const: slave_q2a # Slave Q2A clock 545 - const: ref # REFERENCE clock 546 - const: tbu # PCIe TBU clock 547 - const: ddrss_sf_tbu # PCIe SF TBU clock 548 - properties: 549 clocks: 550 minItems: 8 551 maxItems: 8 552 clock-names: 553 items: 554 - const: pipe # PIPE clock 555 - const: aux # Auxiliary clock 556 - const: cfg # Configuration clock 557 - const: bus_master # Master AXI clock 558 - const: bus_slave # Slave AXI clock 559 - const: slave_q2a # Slave Q2A clock 560 - const: tbu # PCIe TBU clock 561 - const: ddrss_sf_tbu # PCIe SF TBU clock 562 properties: 563 resets: 564 maxItems: 1 565 reset-names: 566 items: 567 - const: pci # PCIe core reset 568 569 - if: 570 properties: 571 compatible: 572 contains: 573 enum: 574 - qcom,pcie-sm8350 575 then: 576 properties: 577 clocks: 578 minItems: 8 579 maxItems: 9 580 clock-names: 581 minItems: 8 582 items: 583 - const: aux # Auxiliary clock 584 - const: cfg # Configuration clock 585 - const: bus_master # Master AXI clock 586 - const: bus_slave # Slave AXI clock 587 - const: slave_q2a # Slave Q2A clock 588 - const: tbu # PCIe TBU clock 589 - const: ddrss_sf_tbu # PCIe SF TBU clock 590 - const: aggre1 # Aggre NoC PCIe1 AXI clock 591 - const: aggre0 # Aggre NoC PCIe0 AXI clock 592 resets: 593 maxItems: 1 594 reset-names: 595 items: 596 - const: pci # PCIe core reset 597 598 - if: 599 properties: 600 compatible: 601 contains: 602 enum: 603 - qcom,pcie-sm8450-pcie0 604 then: 605 properties: 606 clocks: 607 minItems: 12 608 maxItems: 12 609 clock-names: 610 items: 611 - const: pipe # PIPE clock 612 - const: pipe_mux # PIPE MUX 613 - const: phy_pipe # PIPE output clock 614 - const: ref # REFERENCE clock 615 - const: aux # Auxiliary clock 616 - const: cfg # Configuration clock 617 - const: bus_master # Master AXI clock 618 - const: bus_slave # Slave AXI clock 619 - const: slave_q2a # Slave Q2A clock 620 - const: ddrss_sf_tbu # PCIe SF TBU clock 621 - const: aggre0 # Aggre NoC PCIe0 AXI clock 622 - const: aggre1 # Aggre NoC PCIe1 AXI clock 623 resets: 624 maxItems: 1 625 reset-names: 626 items: 627 - const: pci # PCIe core reset 628 629 - if: 630 properties: 631 compatible: 632 contains: 633 enum: 634 - qcom,pcie-sm8450-pcie1 635 then: 636 properties: 637 clocks: 638 minItems: 11 639 maxItems: 11 640 clock-names: 641 items: 642 - const: pipe # PIPE clock 643 - const: pipe_mux # PIPE MUX 644 - const: phy_pipe # PIPE output clock 645 - const: ref # REFERENCE clock 646 - const: aux # Auxiliary clock 647 - const: cfg # Configuration clock 648 - const: bus_master # Master AXI clock 649 - const: bus_slave # Slave AXI clock 650 - const: slave_q2a # Slave Q2A clock 651 - const: ddrss_sf_tbu # PCIe SF TBU clock 652 - const: aggre1 # Aggre NoC PCIe1 AXI clock 653 resets: 654 maxItems: 1 655 reset-names: 656 items: 657 - const: pci # PCIe core reset 658 659 - if: 660 properties: 661 compatible: 662 contains: 663 enum: 664 - qcom,pcie-sm8550 665 then: 666 properties: 667 clocks: 668 minItems: 7 669 maxItems: 8 670 clock-names: 671 minItems: 7 672 items: 673 - const: aux # Auxiliary clock 674 - const: cfg # Configuration clock 675 - const: bus_master # Master AXI clock 676 - const: bus_slave # Slave AXI clock 677 - const: slave_q2a # Slave Q2A clock 678 - const: ddrss_sf_tbu # PCIe SF TBU clock 679 - const: noc_aggr # Aggre NoC PCIe AXI clock 680 - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock 681 resets: 682 minItems: 1 683 maxItems: 2 684 reset-names: 685 minItems: 1 686 items: 687 - const: pci # PCIe core reset 688 - const: link_down # PCIe link down reset 689 690 - if: 691 properties: 692 compatible: 693 contains: 694 enum: 695 - qcom,pcie-sa8540p 696 - qcom,pcie-sc8280xp 697 then: 698 properties: 699 clocks: 700 minItems: 8 701 maxItems: 9 702 clock-names: 703 minItems: 8 704 items: 705 - const: aux # Auxiliary clock 706 - const: cfg # Configuration clock 707 - const: bus_master # Master AXI clock 708 - const: bus_slave # Slave AXI clock 709 - const: slave_q2a # Slave Q2A clock 710 - const: ddrss_sf_tbu # PCIe SF TBU clock 711 - const: noc_aggr_4 # NoC aggregate 4 clock 712 - const: noc_aggr_south_sf # NoC aggregate South SF clock 713 - const: cnoc_qx # Configuration NoC QX clock 714 resets: 715 maxItems: 1 716 reset-names: 717 items: 718 - const: pci # PCIe core reset 719 720 - if: 721 properties: 722 compatible: 723 contains: 724 enum: 725 - qcom,pcie-sdx55 726 then: 727 properties: 728 clocks: 729 minItems: 7 730 maxItems: 7 731 clock-names: 732 items: 733 - const: pipe # PIPE clock 734 - const: aux # Auxiliary clock 735 - const: cfg # Configuration clock 736 - const: bus_master # Master AXI clock 737 - const: bus_slave # Slave AXI clock 738 - const: slave_q2a # Slave Q2A clock 739 - const: sleep # PCIe Sleep clock 740 resets: 741 maxItems: 1 742 reset-names: 743 items: 744 - const: pci # PCIe core reset 745 746 - if: 747 properties: 748 compatible: 749 contains: 750 enum: 751 - qcom,pcie-sa8540p 752 - qcom,pcie-sc8280xp 753 then: 754 required: 755 - interconnects 756 - interconnect-names 757 758 - if: 759 not: 760 properties: 761 compatible: 762 contains: 763 enum: 764 - qcom,pcie-apq8064 765 - qcom,pcie-ipq4019 766 - qcom,pcie-ipq8064 767 - qcom,pcie-ipq8064v2 768 - qcom,pcie-ipq8074 769 - qcom,pcie-ipq8074-gen3 770 - qcom,pcie-qcs404 771 then: 772 required: 773 - power-domains 774 775 - if: 776 not: 777 properties: 778 compatible: 779 contains: 780 enum: 781 - qcom,pcie-msm8996 782 then: 783 required: 784 - resets 785 - reset-names 786 787 - if: 788 properties: 789 compatible: 790 contains: 791 enum: 792 - qcom,pcie-msm8996 793 - qcom,pcie-sc7280 794 - qcom,pcie-sc8180x 795 - qcom,pcie-sdm845 796 - qcom,pcie-sm8150 797 - qcom,pcie-sm8250 798 - qcom,pcie-sm8350 799 - qcom,pcie-sm8450-pcie0 800 - qcom,pcie-sm8450-pcie1 801 - qcom,pcie-sm8550 802 then: 803 oneOf: 804 - properties: 805 interrupts: 806 maxItems: 1 807 interrupt-names: 808 items: 809 - const: msi 810 - properties: 811 interrupts: 812 minItems: 8 813 interrupt-names: 814 items: 815 - const: msi0 816 - const: msi1 817 - const: msi2 818 - const: msi3 819 - const: msi4 820 - const: msi5 821 - const: msi6 822 - const: msi7 823 824 - if: 825 properties: 826 compatible: 827 contains: 828 enum: 829 - qcom,pcie-sc8280xp 830 then: 831 properties: 832 interrupts: 833 minItems: 4 834 maxItems: 4 835 interrupt-names: 836 items: 837 - const: msi0 838 - const: msi1 839 - const: msi2 840 - const: msi3 841 842 - if: 843 properties: 844 compatible: 845 contains: 846 enum: 847 - qcom,pcie-apq8064 848 - qcom,pcie-apq8084 849 - qcom,pcie-ipq4019 850 - qcom,pcie-ipq6018 851 - qcom,pcie-ipq8064 852 - qcom,pcie-ipq8064-v2 853 - qcom,pcie-ipq8074 854 - qcom,pcie-ipq8074-gen3 855 - qcom,pcie-qcs404 856 - qcom,pcie-sa8540p 857 then: 858 properties: 859 interrupts: 860 maxItems: 1 861 interrupt-names: 862 items: 863 - const: msi 864 865unevaluatedProperties: false 866 867examples: 868 - | 869 #include <dt-bindings/interrupt-controller/arm-gic.h> 870 pcie@1b500000 { 871 compatible = "qcom,pcie-ipq8064"; 872 reg = <0x1b500000 0x1000>, 873 <0x1b502000 0x80>, 874 <0x1b600000 0x100>, 875 <0x0ff00000 0x100000>; 876 reg-names = "dbi", "elbi", "parf", "config"; 877 device_type = "pci"; 878 linux,pci-domain = <0>; 879 bus-range = <0x00 0xff>; 880 num-lanes = <1>; 881 #address-cells = <3>; 882 #size-cells = <2>; 883 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 884 <0x82000000 0 0 0x08000000 0 0x07e00000>; 885 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 886 interrupt-names = "msi"; 887 #interrupt-cells = <1>; 888 interrupt-map-mask = <0 0 0 0x7>; 889 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 890 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 891 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 892 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 893 clocks = <&gcc 41>, 894 <&gcc 43>, 895 <&gcc 44>, 896 <&gcc 42>, 897 <&gcc 248>; 898 clock-names = "core", "iface", "phy", "aux", "ref"; 899 resets = <&gcc 27>, 900 <&gcc 26>, 901 <&gcc 25>, 902 <&gcc 24>, 903 <&gcc 23>, 904 <&gcc 22>; 905 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 906 pinctrl-0 = <&pcie_pins_default>; 907 pinctrl-names = "default"; 908 vdda-supply = <&pm8921_s3>; 909 vdda_phy-supply = <&pm8921_lvs6>; 910 vdda_refclk-supply = <&ext_3p3v>; 911 }; 912 - | 913 #include <dt-bindings/interrupt-controller/arm-gic.h> 914 #include <dt-bindings/gpio/gpio.h> 915 pcie@fc520000 { 916 compatible = "qcom,pcie-apq8084"; 917 reg = <0xfc520000 0x2000>, 918 <0xff000000 0x1000>, 919 <0xff001000 0x1000>, 920 <0xff002000 0x2000>; 921 reg-names = "parf", "dbi", "elbi", "config"; 922 device_type = "pci"; 923 linux,pci-domain = <0>; 924 bus-range = <0x00 0xff>; 925 num-lanes = <1>; 926 #address-cells = <3>; 927 #size-cells = <2>; 928 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 929 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 930 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 931 interrupt-names = "msi"; 932 #interrupt-cells = <1>; 933 interrupt-map-mask = <0 0 0 0x7>; 934 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 935 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 936 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 937 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 938 clocks = <&gcc 324>, 939 <&gcc 325>, 940 <&gcc 327>, 941 <&gcc 323>; 942 clock-names = "iface", "master_bus", "slave_bus", "aux"; 943 resets = <&gcc 81>; 944 reset-names = "core"; 945 power-domains = <&gcc 1>; 946 vdda-supply = <&pma8084_l3>; 947 phys = <&pciephy0>; 948 phy-names = "pciephy"; 949 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 950 pinctrl-0 = <&pcie0_pins_default>; 951 pinctrl-names = "default"; 952 }; 953... 954