1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 12 13description: | 14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 25 - qcom,pcie-ipq8064 26 - qcom,pcie-ipq8064-v2 27 - qcom,pcie-ipq8074 28 - qcom,pcie-ipq8074-gen3 29 - qcom,pcie-msm8996 30 - qcom,pcie-qcs404 31 - qcom,pcie-sa8540p 32 - qcom,pcie-sa8775p 33 - qcom,pcie-sc7280 34 - qcom,pcie-sc8180x 35 - qcom,pcie-sc8280xp 36 - qcom,pcie-sdm845 37 - qcom,pcie-sdx55 38 - qcom,pcie-sm8150 39 - qcom,pcie-sm8250 40 - qcom,pcie-sm8350 41 - qcom,pcie-sm8450-pcie0 42 - qcom,pcie-sm8450-pcie1 43 - qcom,pcie-sm8550 44 - items: 45 - enum: 46 - qcom,pcie-sm8650 47 - const: qcom,pcie-sm8550 48 - items: 49 - const: qcom,pcie-msm8998 50 - const: qcom,pcie-msm8996 51 52 reg: 53 minItems: 4 54 maxItems: 6 55 56 reg-names: 57 minItems: 4 58 maxItems: 6 59 60 interrupts: 61 minItems: 1 62 maxItems: 8 63 64 interrupt-names: 65 minItems: 1 66 maxItems: 8 67 68 iommu-map: 69 minItems: 1 70 maxItems: 16 71 72 # Common definitions for clocks, clock-names and reset. 73 # Platform constraints are described later. 74 clocks: 75 minItems: 3 76 maxItems: 13 77 78 clock-names: 79 minItems: 3 80 maxItems: 13 81 82 dma-coherent: true 83 84 interconnects: 85 maxItems: 2 86 87 interconnect-names: 88 items: 89 - const: pcie-mem 90 - const: cpu-pcie 91 92 resets: 93 minItems: 1 94 maxItems: 12 95 96 reset-names: 97 minItems: 1 98 maxItems: 12 99 100 vdda-supply: 101 description: A phandle to the core analog power supply 102 103 vdda_phy-supply: 104 description: A phandle to the core analog power supply for PHY 105 106 vdda_refclk-supply: 107 description: A phandle to the core analog power supply for IC which generates reference clock 108 109 vddpe-3v3-supply: 110 description: A phandle to the PCIe endpoint power supply 111 112 phys: 113 maxItems: 1 114 115 phy-names: 116 items: 117 - const: pciephy 118 119 power-domains: 120 maxItems: 1 121 122 perst-gpios: 123 description: GPIO controlled connection to PERST# signal 124 maxItems: 1 125 126 wake-gpios: 127 description: GPIO controlled connection to WAKE# signal 128 maxItems: 1 129 130required: 131 - compatible 132 - reg 133 - reg-names 134 - interrupt-map-mask 135 - interrupt-map 136 - clocks 137 - clock-names 138 139anyOf: 140 - required: 141 - interrupts 142 - interrupt-names 143 - "#interrupt-cells" 144 - required: 145 - msi-map 146 - msi-map-mask 147 148allOf: 149 - $ref: /schemas/pci/pci-bus.yaml# 150 - if: 151 properties: 152 compatible: 153 contains: 154 enum: 155 - qcom,pcie-apq8064 156 - qcom,pcie-ipq4019 157 - qcom,pcie-ipq8064 158 - qcom,pcie-ipq8064v2 159 - qcom,pcie-ipq8074 160 - qcom,pcie-qcs404 161 then: 162 properties: 163 reg: 164 minItems: 4 165 maxItems: 4 166 reg-names: 167 items: 168 - const: dbi # DesignWare PCIe registers 169 - const: elbi # External local bus interface registers 170 - const: parf # Qualcomm specific registers 171 - const: config # PCIe configuration space 172 173 - if: 174 properties: 175 compatible: 176 contains: 177 enum: 178 - qcom,pcie-ipq6018 179 - qcom,pcie-ipq8074-gen3 180 then: 181 properties: 182 reg: 183 minItems: 5 184 maxItems: 5 185 reg-names: 186 items: 187 - const: dbi # DesignWare PCIe registers 188 - const: elbi # External local bus interface registers 189 - const: atu # ATU address space 190 - const: parf # Qualcomm specific registers 191 - const: config # PCIe configuration space 192 193 - if: 194 properties: 195 compatible: 196 contains: 197 enum: 198 - qcom,pcie-apq8084 199 - qcom,pcie-msm8996 200 - qcom,pcie-sdm845 201 then: 202 properties: 203 reg: 204 minItems: 4 205 maxItems: 5 206 reg-names: 207 minItems: 4 208 items: 209 - const: parf # Qualcomm specific registers 210 - const: dbi # DesignWare PCIe registers 211 - const: elbi # External local bus interface registers 212 - const: config # PCIe configuration space 213 - const: mhi # MHI registers 214 215 - if: 216 properties: 217 compatible: 218 contains: 219 enum: 220 - qcom,pcie-sa8775p 221 - qcom,pcie-sc7280 222 - qcom,pcie-sc8180x 223 - qcom,pcie-sc8280xp 224 - qcom,pcie-sdx55 225 - qcom,pcie-sm8250 226 - qcom,pcie-sm8350 227 - qcom,pcie-sm8450-pcie0 228 - qcom,pcie-sm8450-pcie1 229 - qcom,pcie-sm8550 230 then: 231 properties: 232 reg: 233 minItems: 5 234 maxItems: 6 235 reg-names: 236 minItems: 5 237 items: 238 - const: parf # Qualcomm specific registers 239 - const: dbi # DesignWare PCIe registers 240 - const: elbi # External local bus interface registers 241 - const: atu # ATU address space 242 - const: config # PCIe configuration space 243 - const: mhi # MHI registers 244 245 - if: 246 properties: 247 compatible: 248 contains: 249 enum: 250 - qcom,pcie-apq8064 251 - qcom,pcie-ipq8064 252 - qcom,pcie-ipq8064v2 253 then: 254 properties: 255 clocks: 256 minItems: 3 257 maxItems: 5 258 clock-names: 259 minItems: 3 260 items: 261 - const: core # Clocks the pcie hw block 262 - const: iface # Configuration AHB clock 263 - const: phy # Clocks the pcie PHY block 264 - const: aux # Clocks the pcie AUX block, not on apq8064 265 - const: ref # Clocks the pcie ref block, not on apq8064 266 resets: 267 minItems: 5 268 maxItems: 6 269 reset-names: 270 minItems: 5 271 items: 272 - const: axi # AXI reset 273 - const: ahb # AHB reset 274 - const: por # POR reset 275 - const: pci # PCI reset 276 - const: phy # PHY reset 277 - const: ext # EXT reset, not on apq8064 278 required: 279 - vdda-supply 280 - vdda_phy-supply 281 - vdda_refclk-supply 282 283 - if: 284 properties: 285 compatible: 286 contains: 287 enum: 288 - qcom,pcie-apq8084 289 then: 290 properties: 291 clocks: 292 minItems: 4 293 maxItems: 4 294 clock-names: 295 items: 296 - const: iface # Configuration AHB clock 297 - const: master_bus # Master AXI clock 298 - const: slave_bus # Slave AXI clock 299 - const: aux # Auxiliary (AUX) clock 300 resets: 301 maxItems: 1 302 reset-names: 303 items: 304 - const: core # Core reset 305 306 - if: 307 properties: 308 compatible: 309 contains: 310 enum: 311 - qcom,pcie-ipq4019 312 then: 313 properties: 314 clocks: 315 minItems: 3 316 maxItems: 3 317 clock-names: 318 items: 319 - const: aux # Auxiliary (AUX) clock 320 - const: master_bus # Master AXI clock 321 - const: slave_bus # Slave AXI clock 322 resets: 323 minItems: 12 324 maxItems: 12 325 reset-names: 326 items: 327 - const: axi_m # AXI master reset 328 - const: axi_s # AXI slave reset 329 - const: pipe # PIPE reset 330 - const: axi_m_vmid # VMID reset 331 - const: axi_s_xpu # XPU reset 332 - const: parf # PARF reset 333 - const: phy # PHY reset 334 - const: axi_m_sticky # AXI sticky reset 335 - const: pipe_sticky # PIPE sticky reset 336 - const: pwr # PWR reset 337 - const: ahb # AHB reset 338 - const: phy_ahb # PHY AHB reset 339 340 - if: 341 properties: 342 compatible: 343 contains: 344 enum: 345 - qcom,pcie-msm8996 346 then: 347 properties: 348 clocks: 349 minItems: 5 350 maxItems: 5 351 clock-names: 352 items: 353 - const: pipe # Pipe Clock driving internal logic 354 - const: aux # Auxiliary (AUX) clock 355 - const: cfg # Configuration clock 356 - const: bus_master # Master AXI clock 357 - const: bus_slave # Slave AXI clock 358 resets: false 359 reset-names: false 360 361 - if: 362 properties: 363 compatible: 364 contains: 365 enum: 366 - qcom,pcie-ipq8074 367 then: 368 properties: 369 clocks: 370 minItems: 5 371 maxItems: 5 372 clock-names: 373 items: 374 - const: iface # PCIe to SysNOC BIU clock 375 - const: axi_m # AXI Master clock 376 - const: axi_s # AXI Slave clock 377 - const: ahb # AHB clock 378 - const: aux # Auxiliary clock 379 resets: 380 minItems: 7 381 maxItems: 7 382 reset-names: 383 items: 384 - const: pipe # PIPE reset 385 - const: sleep # Sleep reset 386 - const: sticky # Core Sticky reset 387 - const: axi_m # AXI Master reset 388 - const: axi_s # AXI Slave reset 389 - const: ahb # AHB Reset 390 - const: axi_m_sticky # AXI Master Sticky reset 391 392 - if: 393 properties: 394 compatible: 395 contains: 396 enum: 397 - qcom,pcie-ipq6018 398 - qcom,pcie-ipq8074-gen3 399 then: 400 properties: 401 clocks: 402 minItems: 5 403 maxItems: 5 404 clock-names: 405 items: 406 - const: iface # PCIe to SysNOC BIU clock 407 - const: axi_m # AXI Master clock 408 - const: axi_s # AXI Slave clock 409 - const: axi_bridge # AXI bridge clock 410 - const: rchng 411 resets: 412 minItems: 8 413 maxItems: 8 414 reset-names: 415 items: 416 - const: pipe # PIPE reset 417 - const: sleep # Sleep reset 418 - const: sticky # Core Sticky reset 419 - const: axi_m # AXI Master reset 420 - const: axi_s # AXI Slave reset 421 - const: ahb # AHB Reset 422 - const: axi_m_sticky # AXI Master Sticky reset 423 - const: axi_s_sticky # AXI Slave Sticky reset 424 425 - if: 426 properties: 427 compatible: 428 contains: 429 enum: 430 - qcom,pcie-qcs404 431 then: 432 properties: 433 clocks: 434 minItems: 4 435 maxItems: 4 436 clock-names: 437 items: 438 - const: iface # AHB clock 439 - const: aux # Auxiliary clock 440 - const: master_bus # AXI Master clock 441 - const: slave_bus # AXI Slave clock 442 resets: 443 minItems: 6 444 maxItems: 6 445 reset-names: 446 items: 447 - const: axi_m # AXI Master reset 448 - const: axi_s # AXI Slave reset 449 - const: axi_m_sticky # AXI Master Sticky reset 450 - const: pipe_sticky # PIPE sticky reset 451 - const: pwr # PWR reset 452 - const: ahb # AHB reset 453 454 - if: 455 properties: 456 compatible: 457 contains: 458 enum: 459 - qcom,pcie-sc7280 460 then: 461 properties: 462 clocks: 463 minItems: 13 464 maxItems: 13 465 clock-names: 466 items: 467 - const: pipe # PIPE clock 468 - const: pipe_mux # PIPE MUX 469 - const: phy_pipe # PIPE output clock 470 - const: ref # REFERENCE clock 471 - const: aux # Auxiliary clock 472 - const: cfg # Configuration clock 473 - const: bus_master # Master AXI clock 474 - const: bus_slave # Slave AXI clock 475 - const: slave_q2a # Slave Q2A clock 476 - const: tbu # PCIe TBU clock 477 - const: ddrss_sf_tbu # PCIe SF TBU clock 478 - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock 479 - const: aggre1 # Aggre NoC PCIe1 AXI clock 480 resets: 481 maxItems: 1 482 reset-names: 483 items: 484 - const: pci # PCIe core reset 485 486 - if: 487 properties: 488 compatible: 489 contains: 490 enum: 491 - qcom,pcie-sc8180x 492 then: 493 properties: 494 clocks: 495 minItems: 8 496 maxItems: 8 497 clock-names: 498 items: 499 - const: pipe # PIPE clock 500 - const: aux # Auxiliary clock 501 - const: cfg # Configuration clock 502 - const: bus_master # Master AXI clock 503 - const: bus_slave # Slave AXI clock 504 - const: slave_q2a # Slave Q2A clock 505 - const: ref # REFERENCE clock 506 - const: tbu # PCIe TBU clock 507 resets: 508 maxItems: 1 509 reset-names: 510 items: 511 - const: pci # PCIe core reset 512 513 - if: 514 properties: 515 compatible: 516 contains: 517 enum: 518 - qcom,pcie-sdm845 519 then: 520 oneOf: 521 # Unfortunately the "optional" ref clock is used in the middle of the list 522 - properties: 523 clocks: 524 minItems: 8 525 maxItems: 8 526 clock-names: 527 items: 528 - const: pipe # PIPE clock 529 - const: aux # Auxiliary clock 530 - const: cfg # Configuration clock 531 - const: bus_master # Master AXI clock 532 - const: bus_slave # Slave AXI clock 533 - const: slave_q2a # Slave Q2A clock 534 - const: ref # REFERENCE clock 535 - const: tbu # PCIe TBU clock 536 - properties: 537 clocks: 538 minItems: 7 539 maxItems: 7 540 clock-names: 541 items: 542 - const: pipe # PIPE clock 543 - const: aux # Auxiliary clock 544 - const: cfg # Configuration clock 545 - const: bus_master # Master AXI clock 546 - const: bus_slave # Slave AXI clock 547 - const: slave_q2a # Slave Q2A clock 548 - const: tbu # PCIe TBU clock 549 properties: 550 resets: 551 maxItems: 1 552 reset-names: 553 items: 554 - const: pci # PCIe core reset 555 556 - if: 557 properties: 558 compatible: 559 contains: 560 enum: 561 - qcom,pcie-sm8150 562 then: 563 properties: 564 clocks: 565 minItems: 8 566 maxItems: 8 567 clock-names: 568 items: 569 - const: pipe # PIPE clock 570 - const: aux # Auxiliary clock 571 - const: cfg # Configuration clock 572 - const: bus_master # Master AXI clock 573 - const: bus_slave # Slave AXI clock 574 - const: slave_q2a # Slave Q2A clock 575 - const: tbu # PCIe TBU clock 576 - const: ref # REFERENCE clock 577 resets: 578 maxItems: 1 579 reset-names: 580 items: 581 - const: pci # PCIe core reset 582 583 - if: 584 properties: 585 compatible: 586 contains: 587 enum: 588 - qcom,pcie-sm8250 589 then: 590 oneOf: 591 # Unfortunately the "optional" ref clock is used in the middle of the list 592 - properties: 593 clocks: 594 minItems: 9 595 maxItems: 9 596 clock-names: 597 items: 598 - const: pipe # PIPE clock 599 - const: aux # Auxiliary clock 600 - const: cfg # Configuration clock 601 - const: bus_master # Master AXI clock 602 - const: bus_slave # Slave AXI clock 603 - const: slave_q2a # Slave Q2A clock 604 - const: ref # REFERENCE clock 605 - const: tbu # PCIe TBU clock 606 - const: ddrss_sf_tbu # PCIe SF TBU clock 607 - properties: 608 clocks: 609 minItems: 8 610 maxItems: 8 611 clock-names: 612 items: 613 - const: pipe # PIPE clock 614 - const: aux # Auxiliary clock 615 - const: cfg # Configuration clock 616 - const: bus_master # Master AXI clock 617 - const: bus_slave # Slave AXI clock 618 - const: slave_q2a # Slave Q2A clock 619 - const: tbu # PCIe TBU clock 620 - const: ddrss_sf_tbu # PCIe SF TBU clock 621 properties: 622 resets: 623 maxItems: 1 624 reset-names: 625 items: 626 - const: pci # PCIe core reset 627 628 - if: 629 properties: 630 compatible: 631 contains: 632 enum: 633 - qcom,pcie-sm8350 634 then: 635 properties: 636 clocks: 637 minItems: 8 638 maxItems: 9 639 clock-names: 640 minItems: 8 641 items: 642 - const: aux # Auxiliary clock 643 - const: cfg # Configuration clock 644 - const: bus_master # Master AXI clock 645 - const: bus_slave # Slave AXI clock 646 - const: slave_q2a # Slave Q2A clock 647 - const: tbu # PCIe TBU clock 648 - const: ddrss_sf_tbu # PCIe SF TBU clock 649 - const: aggre1 # Aggre NoC PCIe1 AXI clock 650 - const: aggre0 # Aggre NoC PCIe0 AXI clock 651 resets: 652 maxItems: 1 653 reset-names: 654 items: 655 - const: pci # PCIe core reset 656 657 - if: 658 properties: 659 compatible: 660 contains: 661 enum: 662 - qcom,pcie-sm8450-pcie0 663 then: 664 properties: 665 clocks: 666 minItems: 12 667 maxItems: 12 668 clock-names: 669 items: 670 - const: pipe # PIPE clock 671 - const: pipe_mux # PIPE MUX 672 - const: phy_pipe # PIPE output clock 673 - const: ref # REFERENCE clock 674 - const: aux # Auxiliary clock 675 - const: cfg # Configuration clock 676 - const: bus_master # Master AXI clock 677 - const: bus_slave # Slave AXI clock 678 - const: slave_q2a # Slave Q2A clock 679 - const: ddrss_sf_tbu # PCIe SF TBU clock 680 - const: aggre0 # Aggre NoC PCIe0 AXI clock 681 - const: aggre1 # Aggre NoC PCIe1 AXI clock 682 resets: 683 maxItems: 1 684 reset-names: 685 items: 686 - const: pci # PCIe core reset 687 688 - if: 689 properties: 690 compatible: 691 contains: 692 enum: 693 - qcom,pcie-sm8450-pcie1 694 then: 695 properties: 696 clocks: 697 minItems: 11 698 maxItems: 11 699 clock-names: 700 items: 701 - const: pipe # PIPE clock 702 - const: pipe_mux # PIPE MUX 703 - const: phy_pipe # PIPE output clock 704 - const: ref # REFERENCE clock 705 - const: aux # Auxiliary clock 706 - const: cfg # Configuration clock 707 - const: bus_master # Master AXI clock 708 - const: bus_slave # Slave AXI clock 709 - const: slave_q2a # Slave Q2A clock 710 - const: ddrss_sf_tbu # PCIe SF TBU clock 711 - const: aggre1 # Aggre NoC PCIe1 AXI clock 712 resets: 713 maxItems: 1 714 reset-names: 715 items: 716 - const: pci # PCIe core reset 717 718 - if: 719 properties: 720 compatible: 721 contains: 722 enum: 723 - qcom,pcie-sm8550 724 then: 725 properties: 726 clocks: 727 minItems: 7 728 maxItems: 8 729 clock-names: 730 minItems: 7 731 items: 732 - const: aux # Auxiliary clock 733 - const: cfg # Configuration clock 734 - const: bus_master # Master AXI clock 735 - const: bus_slave # Slave AXI clock 736 - const: slave_q2a # Slave Q2A clock 737 - const: ddrss_sf_tbu # PCIe SF TBU clock 738 - const: noc_aggr # Aggre NoC PCIe AXI clock 739 - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock 740 resets: 741 minItems: 1 742 maxItems: 2 743 reset-names: 744 minItems: 1 745 items: 746 - const: pci # PCIe core reset 747 - const: link_down # PCIe link down reset 748 749 - if: 750 properties: 751 compatible: 752 contains: 753 enum: 754 - qcom,pcie-sa8540p 755 - qcom,pcie-sc8280xp 756 then: 757 properties: 758 clocks: 759 minItems: 8 760 maxItems: 9 761 clock-names: 762 minItems: 8 763 items: 764 - const: aux # Auxiliary clock 765 - const: cfg # Configuration clock 766 - const: bus_master # Master AXI clock 767 - const: bus_slave # Slave AXI clock 768 - const: slave_q2a # Slave Q2A clock 769 - const: ddrss_sf_tbu # PCIe SF TBU clock 770 - const: noc_aggr_4 # NoC aggregate 4 clock 771 - const: noc_aggr_south_sf # NoC aggregate South SF clock 772 - const: cnoc_qx # Configuration NoC QX clock 773 resets: 774 maxItems: 1 775 reset-names: 776 items: 777 - const: pci # PCIe core reset 778 779 - if: 780 properties: 781 compatible: 782 contains: 783 enum: 784 - qcom,pcie-sdx55 785 then: 786 properties: 787 clocks: 788 minItems: 7 789 maxItems: 7 790 clock-names: 791 items: 792 - const: pipe # PIPE clock 793 - const: aux # Auxiliary clock 794 - const: cfg # Configuration clock 795 - const: bus_master # Master AXI clock 796 - const: bus_slave # Slave AXI clock 797 - const: slave_q2a # Slave Q2A clock 798 - const: sleep # PCIe Sleep clock 799 resets: 800 maxItems: 1 801 reset-names: 802 items: 803 - const: pci # PCIe core reset 804 805 - if: 806 properties: 807 compatible: 808 contains: 809 enum: 810 - qcom,pcie-sa8775p 811 then: 812 properties: 813 clocks: 814 minItems: 5 815 maxItems: 5 816 clock-names: 817 items: 818 - const: aux # Auxiliary clock 819 - const: cfg # Configuration clock 820 - const: bus_master # Master AXI clock 821 - const: bus_slave # Slave AXI clock 822 - const: slave_q2a # Slave Q2A clock 823 resets: 824 maxItems: 1 825 reset-names: 826 items: 827 - const: pci # PCIe core reset 828 829 - if: 830 properties: 831 compatible: 832 contains: 833 enum: 834 - qcom,pcie-sa8540p 835 - qcom,pcie-sa8775p 836 - qcom,pcie-sc8280xp 837 then: 838 required: 839 - interconnects 840 - interconnect-names 841 842 - if: 843 not: 844 properties: 845 compatible: 846 contains: 847 enum: 848 - qcom,pcie-apq8064 849 - qcom,pcie-ipq4019 850 - qcom,pcie-ipq8064 851 - qcom,pcie-ipq8064v2 852 - qcom,pcie-ipq8074 853 - qcom,pcie-ipq8074-gen3 854 - qcom,pcie-qcs404 855 then: 856 required: 857 - power-domains 858 859 - if: 860 not: 861 properties: 862 compatible: 863 contains: 864 enum: 865 - qcom,pcie-msm8996 866 then: 867 required: 868 - resets 869 - reset-names 870 871 - if: 872 properties: 873 compatible: 874 contains: 875 enum: 876 - qcom,pcie-msm8996 877 - qcom,pcie-sa8775p 878 - qcom,pcie-sc7280 879 - qcom,pcie-sc8180x 880 - qcom,pcie-sdm845 881 - qcom,pcie-sm8150 882 - qcom,pcie-sm8250 883 - qcom,pcie-sm8350 884 - qcom,pcie-sm8450-pcie0 885 - qcom,pcie-sm8450-pcie1 886 - qcom,pcie-sm8550 887 then: 888 oneOf: 889 - properties: 890 interrupts: 891 maxItems: 1 892 interrupt-names: 893 items: 894 - const: msi 895 - properties: 896 interrupts: 897 minItems: 8 898 interrupt-names: 899 items: 900 - const: msi0 901 - const: msi1 902 - const: msi2 903 - const: msi3 904 - const: msi4 905 - const: msi5 906 - const: msi6 907 - const: msi7 908 909 - if: 910 properties: 911 compatible: 912 contains: 913 enum: 914 - qcom,pcie-sc8280xp 915 then: 916 properties: 917 interrupts: 918 minItems: 4 919 maxItems: 4 920 interrupt-names: 921 items: 922 - const: msi0 923 - const: msi1 924 - const: msi2 925 - const: msi3 926 927 - if: 928 properties: 929 compatible: 930 contains: 931 enum: 932 - qcom,pcie-apq8064 933 - qcom,pcie-apq8084 934 - qcom,pcie-ipq4019 935 - qcom,pcie-ipq6018 936 - qcom,pcie-ipq8064 937 - qcom,pcie-ipq8064-v2 938 - qcom,pcie-ipq8074 939 - qcom,pcie-ipq8074-gen3 940 - qcom,pcie-qcs404 941 - qcom,pcie-sa8540p 942 then: 943 properties: 944 interrupts: 945 maxItems: 1 946 interrupt-names: 947 items: 948 - const: msi 949 950unevaluatedProperties: false 951 952examples: 953 - | 954 #include <dt-bindings/interrupt-controller/arm-gic.h> 955 pcie@1b500000 { 956 compatible = "qcom,pcie-ipq8064"; 957 reg = <0x1b500000 0x1000>, 958 <0x1b502000 0x80>, 959 <0x1b600000 0x100>, 960 <0x0ff00000 0x100000>; 961 reg-names = "dbi", "elbi", "parf", "config"; 962 device_type = "pci"; 963 linux,pci-domain = <0>; 964 bus-range = <0x00 0xff>; 965 num-lanes = <1>; 966 #address-cells = <3>; 967 #size-cells = <2>; 968 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 969 <0x82000000 0 0 0x08000000 0 0x07e00000>; 970 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 971 interrupt-names = "msi"; 972 #interrupt-cells = <1>; 973 interrupt-map-mask = <0 0 0 0x7>; 974 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 975 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 976 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 977 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 978 clocks = <&gcc 41>, 979 <&gcc 43>, 980 <&gcc 44>, 981 <&gcc 42>, 982 <&gcc 248>; 983 clock-names = "core", "iface", "phy", "aux", "ref"; 984 resets = <&gcc 27>, 985 <&gcc 26>, 986 <&gcc 25>, 987 <&gcc 24>, 988 <&gcc 23>, 989 <&gcc 22>; 990 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 991 pinctrl-0 = <&pcie_pins_default>; 992 pinctrl-names = "default"; 993 vdda-supply = <&pm8921_s3>; 994 vdda_phy-supply = <&pm8921_lvs6>; 995 vdda_refclk-supply = <&ext_3p3v>; 996 }; 997 - | 998 #include <dt-bindings/interrupt-controller/arm-gic.h> 999 #include <dt-bindings/gpio/gpio.h> 1000 pcie@fc520000 { 1001 compatible = "qcom,pcie-apq8084"; 1002 reg = <0xfc520000 0x2000>, 1003 <0xff000000 0x1000>, 1004 <0xff001000 0x1000>, 1005 <0xff002000 0x2000>; 1006 reg-names = "parf", "dbi", "elbi", "config"; 1007 device_type = "pci"; 1008 linux,pci-domain = <0>; 1009 bus-range = <0x00 0xff>; 1010 num-lanes = <1>; 1011 #address-cells = <3>; 1012 #size-cells = <2>; 1013 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 1014 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 1015 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1016 interrupt-names = "msi"; 1017 #interrupt-cells = <1>; 1018 interrupt-map-mask = <0 0 0 0x7>; 1019 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 1020 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 1021 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 1022 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 1023 clocks = <&gcc 324>, 1024 <&gcc 325>, 1025 <&gcc 327>, 1026 <&gcc 323>; 1027 clock-names = "iface", "master_bus", "slave_bus", "aux"; 1028 resets = <&gcc 81>; 1029 reset-names = "core"; 1030 power-domains = <&gcc 1>; 1031 vdda-supply = <&pma8084_l3>; 1032 phys = <&pciephy0>; 1033 phy-names = "pciephy"; 1034 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 1035 pinctrl-0 = <&pcie0_pins_default>; 1036 pinctrl-names = "default"; 1037 }; 1038... 1039