xref: /freebsd/sys/contrib/device-tree/Bindings/net/wireless/qcom,ath10k.yaml (revision fac71e4e09885bb2afa3d984a0c239a52e1a7418) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/wireless/qcom,ath10k.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies ath10k wireless devices
8
9maintainers:
10  - Kalle Valo <kvalo@kernel.org>
11
12description:
13  Qualcomm Technologies, Inc. IEEE 802.11ac devices.
14
15properties:
16  compatible:
17    enum:
18      - qcom,ath10k # SDIO-based devices
19      - qcom,ipq4019-wifi
20      - qcom,wcn3990-wifi # SNoC-based devices
21
22  reg:
23    maxItems: 1
24
25  reg-names:
26    items:
27      - const: membase
28
29  interrupts:
30    minItems: 12
31    maxItems: 17
32
33  interrupt-names:
34    minItems: 12
35    maxItems: 17
36
37  memory-region:
38    maxItems: 1
39    description:
40      Reference to the MSA memory region used by the Wi-Fi firmware
41      running on the Q6 core.
42
43  iommus:
44    minItems: 1
45    maxItems: 2
46
47  clocks:
48    minItems: 1
49    maxItems: 3
50
51  clock-names:
52    minItems: 1
53    maxItems: 3
54
55  resets:
56    maxItems: 6
57
58  reset-names:
59    items:
60      - const: wifi_cpu_init
61      - const: wifi_radio_srif
62      - const: wifi_radio_warm
63      - const: wifi_radio_cold
64      - const: wifi_core_warm
65      - const: wifi_core_cold
66
67  ext-fem-name:
68    $ref: /schemas/types.yaml#/definitions/string
69    description: Name of external front end module used.
70    enum:
71      - microsemi-lx5586
72      - sky85703-11
73      - sky85803
74
75  wifi-firmware:
76    type: object
77    additionalProperties: false
78    description: |
79      The ath10k Wi-Fi node can contain one optional firmware subnode.
80      Firmware subnode is needed when the platform does not have Trustzone.
81    properties:
82      iommus:
83        maxItems: 1
84    required:
85      - iommus
86
87  qcom,ath10k-calibration-data:
88    $ref: /schemas/types.yaml#/definitions/uint8-array
89    description:
90      Calibration data + board-specific data as a byte array. The length
91      can vary between hardware versions.
92
93  qcom,ath10k-calibration-variant:
94    $ref: /schemas/types.yaml#/definitions/string
95    description:
96      Unique variant identifier of the calibration data in board-2.bin
97      for designs with colliding bus and device specific ids
98
99  qcom,ath10k-pre-calibration-data:
100    $ref: /schemas/types.yaml#/definitions/uint8-array
101    description:
102      Pre-calibration data as a byte array. The length can vary between
103      hardware versions.
104
105  qcom,coexist-support:
106    $ref: /schemas/types.yaml#/definitions/uint8
107    enum: [0, 1]
108    description:
109      Indicate coex support by the hardware.
110
111  qcom,coexist-gpio-pin:
112    $ref: /schemas/types.yaml#/definitions/uint32
113    description:
114      COEX GPIO number provided to the Wi-Fi firmware.
115
116  qcom,msa-fixed-perm:
117    type: boolean
118    description:
119      Whether to skip executing an SCM call that reassigns the memory
120      region ownership.
121
122  qcom,smem-states:
123    $ref: /schemas/types.yaml#/definitions/phandle-array
124    description: State bits used by the AP to signal the WLAN Q6.
125    items:
126      - description: Signal bits used to enable/disable low power mode
127                     on WCN in the case of WoW (Wake on Wireless).
128
129  qcom,smem-state-names:
130    description: The names of the state bits used for SMP2P output.
131    items:
132      - const: wlan-smp2p-out
133
134  qcom,snoc-host-cap-8bit-quirk:
135    type: boolean
136    description:
137      Quirk specifying that the firmware expects the 8bit version
138      of the host capability QMI request
139
140  qcom,xo-cal-data:
141    $ref: /schemas/types.yaml#/definitions/uint32
142    description:
143      XO cal offset to be configured in XO trim register.
144
145  vdd-0.8-cx-mx-supply:
146    description: Main logic power rail
147
148  vdd-1.8-xo-supply:
149    description: Crystal oscillator supply
150
151  vdd-1.3-rfa-supply:
152    description: RFA supply
153
154  vdd-3.3-ch0-supply:
155    description: Primary Wi-Fi antenna supply
156
157  vdd-3.3-ch1-supply:
158    description: Secondary Wi-Fi antenna supply
159
160required:
161  - compatible
162  - reg
163
164additionalProperties: false
165
166allOf:
167  - if:
168      properties:
169        compatible:
170          contains:
171            enum:
172              - qcom,ipq4019-wifi
173    then:
174      properties:
175        interrupts:
176          minItems: 17
177          maxItems: 17
178
179        interrupt-names:
180          items:
181            - const: msi0
182            - const: msi1
183            - const: msi2
184            - const: msi3
185            - const: msi4
186            - const: msi5
187            - const: msi6
188            - const: msi7
189            - const: msi8
190            - const: msi9
191            - const: msi10
192            - const: msi11
193            - const: msi12
194            - const: msi13
195            - const: msi14
196            - const: msi15
197            - const: legacy
198
199        clocks:
200          items:
201            - description: Wi-Fi command clock
202            - description: Wi-Fi reference clock
203            - description: Wi-Fi RTC clock
204
205        clock-names:
206          items:
207            - const: wifi_wcss_cmd
208            - const: wifi_wcss_ref
209            - const: wifi_wcss_rtc
210
211      required:
212        - clocks
213        - clock-names
214        - interrupts
215        - interrupt-names
216        - resets
217        - reset-names
218
219  - if:
220      properties:
221        compatible:
222          contains:
223            enum:
224              - qcom,wcn3990-wifi
225
226    then:
227      properties:
228        clocks:
229          minItems: 1
230          items:
231            - description: XO reference clock
232            - description: Qualcomm Debug Subsystem clock
233
234        clock-names:
235          minItems: 1
236          items:
237            - const: cxo_ref_clk_pin
238            - const: qdss
239
240        interrupts:
241          items:
242            - description: CE0
243            - description: CE1
244            - description: CE2
245            - description: CE3
246            - description: CE4
247            - description: CE5
248            - description: CE6
249            - description: CE7
250            - description: CE8
251            - description: CE9
252            - description: CE10
253            - description: CE11
254
255        interrupt-names: false
256
257      required:
258        - interrupts
259
260examples:
261  # SNoC
262  - |
263    #include <dt-bindings/clock/qcom,rpmcc.h>
264    #include <dt-bindings/interrupt-controller/arm-gic.h>
265
266    wifi@18800000 {
267      compatible = "qcom,wcn3990-wifi";
268      reg = <0x18800000 0x800000>;
269      reg-names = "membase";
270      memory-region = <&wlan_msa_mem>;
271      clocks = <&rpmcc RPM_SMD_RF_CLK2_PIN>;
272      clock-names = "cxo_ref_clk_pin";
273      interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
274                   <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
275                   <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
276                   <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
277                   <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
278                   <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
279                   <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
280                   <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
281                   <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
282                   <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
283                   <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
284                   <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
285      iommus = <&anoc2_smmu 0x1900>,
286               <&anoc2_smmu 0x1901>;
287      qcom,snoc-host-cap-8bit-quirk;
288      vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
289      vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
290      vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
291      vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
292      vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
293
294      wifi-firmware {
295        iommus = <&apps_smmu 0x1c02 0x1>;
296      };
297    };
298
299  # AHB
300  - |
301    #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
302
303    wifi@a000000 {
304        compatible = "qcom,ipq4019-wifi";
305        reg = <0xa000000 0x200000>;
306        resets = <&gcc WIFI0_CPU_INIT_RESET>,
307                 <&gcc WIFI0_RADIO_SRIF_RESET>,
308                 <&gcc WIFI0_RADIO_WARM_RESET>,
309                 <&gcc WIFI0_RADIO_COLD_RESET>,
310                 <&gcc WIFI0_CORE_WARM_RESET>,
311                 <&gcc WIFI0_CORE_COLD_RESET>;
312        reset-names = "wifi_cpu_init",
313                      "wifi_radio_srif",
314                      "wifi_radio_warm",
315                      "wifi_radio_cold",
316                      "wifi_core_warm",
317                      "wifi_core_cold";
318        clocks = <&gcc GCC_WCSS2G_CLK>,
319                 <&gcc GCC_WCSS2G_REF_CLK>,
320                 <&gcc GCC_WCSS2G_RTC_CLK>;
321        clock-names = "wifi_wcss_cmd",
322                      "wifi_wcss_ref",
323                      "wifi_wcss_rtc";
324        interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
325                     <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
326                     <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
327                     <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
328                     <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
329                     <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>,
330                     <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>,
331                     <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
332                     <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,
333                     <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>,
334                     <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>,
335                     <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>,
336                     <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
337                     <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
338                     <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
339                     <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
340                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
341        interrupt-names =  "msi0",
342                           "msi1",
343                           "msi2",
344                           "msi3",
345                           "msi4",
346                           "msi5",
347                           "msi6",
348                           "msi7",
349                           "msi8",
350                           "msi9",
351                           "msi10",
352                           "msi11",
353                           "msi12",
354                           "msi13",
355                           "msi14",
356                           "msi15",
357                           "legacy";
358      };
359