1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 3 4%YAML 1.2 5--- 6$id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml# 7$schema: http://devicetree.org/meta-schemas/core.yaml# 8 9title: MediaTek mt76 wireless devices Generic Binding 10 11maintainers: 12 - Felix Fietkau <nbd@nbd.name> 13 - Lorenzo Bianconi <lorenzo@kernel.org> 14 - Ryder Lee <ryder.lee@mediatek.com> 15 16description: | 17 This node provides properties for configuring the MediaTek mt76xx 18 wireless device. The node is expected to be specified as a child 19 node of the PCI controller to which the wireless chip is connected. 20 Alternatively, it can specify the wireless part of the MT7628/MT7688 21 or MT7622/MT7986 SoC. 22 23allOf: 24 - $ref: ieee80211.yaml# 25 26properties: 27 compatible: 28 enum: 29 - mediatek,mt76 30 - mediatek,mt7628-wmac 31 - mediatek,mt7622-wmac 32 - mediatek,mt7986-wmac 33 34 reg: 35 minItems: 1 36 maxItems: 3 37 description: 38 MT7986 should contain 3 regions consys, dcm, and sku, in this order. 39 40 interrupts: 41 maxItems: 1 42 43 power-domains: 44 maxItems: 1 45 46 memory-region: 47 maxItems: 1 48 49 resets: 50 maxItems: 1 51 description: 52 Specify the consys reset for mt7986. 53 54 reset-names: 55 const: consys 56 57 clocks: 58 maxItems: 2 59 description: 60 Specify the consys clocks for mt7986. 61 62 clock-names: 63 items: 64 - const: mcu 65 - const: ap2conn 66 67 mediatek,infracfg: 68 $ref: /schemas/types.yaml#/definitions/phandle 69 description: 70 Phandle to the infrastructure bus fabric syscon node. 71 This property is MT7622 specific 72 73 ieee80211-freq-limit: true 74 75 mediatek,eeprom-data: 76 $ref: /schemas/types.yaml#/definitions/uint32-array 77 description: 78 EEPROM data embedded as array. 79 80 mediatek,mtd-eeprom: 81 $ref: /schemas/types.yaml#/definitions/phandle-array 82 items: 83 - items: 84 - description: phandle to MTD partition 85 - description: offset containing EEPROM data 86 description: 87 Phandle to a MTD partition + offset containing EEPROM data 88 89 big-endian: 90 $ref: /schemas/types.yaml#/definitions/flag 91 description: 92 Specify if the radio eeprom partition is written in big-endian 93 94 mediatek,eeprom-merge-otp: 95 type: boolean 96 description: 97 Merge EEPROM data with OTP data. Can be used on boards where the flash 98 calibration data is generic and specific calibration data should be 99 pulled from the OTP ROM 100 101 mediatek,disable-radar-background: 102 type: boolean 103 description: 104 Disable/enable radar/CAC detection running on a dedicated offchannel 105 chain available on some hw. 106 Background radar/CAC detection allows to avoid the CAC downtime 107 switching on a different channel during CAC detection on the selected 108 radar channel. 109 110 led: 111 type: object 112 $ref: /schemas/leds/common.yaml# 113 additionalProperties: false 114 properties: 115 led-sources: 116 maxItems: 1 117 118 power-limits: 119 type: object 120 additionalProperties: false 121 patternProperties: 122 "^r[0-9]+": 123 type: object 124 additionalProperties: false 125 properties: 126 regdomain: 127 $ref: /schemas/types.yaml#/definitions/string 128 description: 129 Regdomain refers to a legal regulatory region. Different 130 countries define different levels of allowable transmitter 131 power, time that a channel can be occupied, and different 132 available channels 133 enum: 134 - FCC 135 - ETSI 136 - JP 137 138 patternProperties: 139 "^txpower-[256]g$": 140 type: object 141 additionalProperties: false 142 patternProperties: 143 "^b[0-9]+$": 144 type: object 145 additionalProperties: false 146 properties: 147 channels: 148 $ref: /schemas/types.yaml#/definitions/uint32-array 149 minItems: 2 150 maxItems: 2 151 description: 152 Pairs of first and last channel number of the selected 153 band 154 155 rates-cck: 156 $ref: /schemas/types.yaml#/definitions/uint8-array 157 minItems: 4 158 maxItems: 4 159 description: 160 4 half-dBm per-rate power limit values 161 162 rates-ofdm: 163 $ref: /schemas/types.yaml#/definitions/uint8-array 164 minItems: 8 165 maxItems: 8 166 description: 167 8 half-dBm per-rate power limit values 168 169 rates-mcs: 170 $ref: /schemas/types.yaml#/definitions/uint8-matrix 171 description: 172 Sets of per-rate power limit values for 802.11n/802.11ac 173 rates for multiple channel bandwidth settings. 174 Each set starts with the number of channel bandwidth 175 settings for which the rate set applies, followed by 176 either 8 or 10 power limit values. The order of the 177 channel bandwidth settings is 20, 40, 80 and 160 MHz. 178 maxItems: 4 179 items: 180 minItems: 9 181 maxItems: 11 182 183 rates-ru: 184 $ref: /schemas/types.yaml#/definitions/uint8-matrix 185 description: 186 Sets of per-rate power limit values for 802.11ax rates 187 for multiple channel bandwidth or resource unit settings. 188 Each set starts with the number of channel bandwidth or 189 resource unit settings for which the rate set applies, 190 followed by 12 power limit values. The order of the 191 channel resource unit settings is RU26, RU52, RU106, 192 RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160. 193 items: 194 minItems: 13 195 maxItems: 13 196 197 txs-delta: 198 $ref: /schemas/types.yaml#/definitions/uint32-array 199 description: 200 Half-dBm power delta for different numbers of antennas 201 202required: 203 - compatible 204 - reg 205 206unevaluatedProperties: false 207 208examples: 209 - | 210 pcie0 { 211 #address-cells = <3>; 212 #size-cells = <2>; 213 wifi@0,0 { 214 compatible = "mediatek,mt76"; 215 reg = <0x0000 0 0 0 0>; 216 ieee80211-freq-limit = <5000000 6000000>; 217 mediatek,mtd-eeprom = <&factory 0x8000>; 218 big-endian; 219 220 led { 221 led-sources = <2>; 222 }; 223 224 power-limits { 225 r0 { 226 regdomain = "FCC"; 227 txpower-5g { 228 b0 { 229 channels = <36 48>; 230 rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>; 231 rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>, 232 /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>; 233 rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>, 234 /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>; 235 }; 236 b1 { 237 channels = <100 181>; 238 rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>; 239 rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>; 240 txs-delta = <12 9 6>; 241 rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>; 242 }; 243 }; 244 }; 245 }; 246 }; 247 }; 248 249 - | 250 wifi@10300000 { 251 compatible = "mediatek,mt7628-wmac"; 252 reg = <0x10300000 0x100000>; 253 254 interrupt-parent = <&cpuintc>; 255 interrupts = <6>; 256 257 mediatek,mtd-eeprom = <&factory 0x0>; 258 }; 259 260 - | 261 #include <dt-bindings/interrupt-controller/arm-gic.h> 262 #include <dt-bindings/interrupt-controller/irq.h> 263 wifi@18000000 { 264 compatible = "mediatek,mt7622-wmac"; 265 reg = <0x10300000 0x100000>; 266 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>; 267 268 mediatek,infracfg = <&infracfg>; 269 270 power-domains = <&scpsys 3>; 271 }; 272 273 - | 274 wifi@18000000 { 275 compatible = "mediatek,mt7986-wmac"; 276 resets = <&watchdog 23>; 277 reset-names = "consys"; 278 reg = <0x18000000 0x1000000>, 279 <0x10003000 0x1000>, 280 <0x11d10000 0x1000>; 281 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; 282 clocks = <&topckgen 50>, 283 <&topckgen 62>; 284 clock-names = "mcu", "ap2conn"; 285 memory-region = <&wmcpu_emi>; 286 }; 287