1*c66ec88fSEmmanuel VadotSTMicroelectronics SoC DWMAC glue layer controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotThis file documents differences between the core properties in 4*c66ec88fSEmmanuel VadotDocumentation/devicetree/bindings/net/stmmac.txt 5*c66ec88fSEmmanuel Vadotand what is needed on STi platforms to program the stmmac glue logic. 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel VadotThe device node has following properties. 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel VadotRequired properties: 10*c66ec88fSEmmanuel Vadot - compatible : Can be "st,stih415-dwmac", "st,stih416-dwmac", 11*c66ec88fSEmmanuel Vadot "st,stih407-dwmac", "st,stid127-dwmac". 12*c66ec88fSEmmanuel Vadot - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which 13*c66ec88fSEmmanuel Vadot encompases the glue register, and the offset of the control register. 14*c66ec88fSEmmanuel Vadot - st,gmac_en: this is to enable the gmac into a dedicated sysctl control 15*c66ec88fSEmmanuel Vadot register available on STiH407 SoC. 16*c66ec88fSEmmanuel Vadot - pinctrl-0: pin-control for all the MII mode supported. 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotOptional properties: 19*c66ec88fSEmmanuel Vadot - resets : phandle pointing to the system reset controller with correct 20*c66ec88fSEmmanuel Vadot reset line index for ethernet reset. 21*c66ec88fSEmmanuel Vadot - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or 22*c66ec88fSEmmanuel Vadot MAC can generate it. 23*c66ec88fSEmmanuel Vadot - st,tx-retime-src: This specifies which clk is wired up to the mac for 24*c66ec88fSEmmanuel Vadot retimeing tx lines. This is totally board dependent and can take one of the 25*c66ec88fSEmmanuel Vadot posssible values from "txclk", "clk_125" or "clkgen". 26*c66ec88fSEmmanuel Vadot If not passed, the internal clock will be used by default. 27*c66ec88fSEmmanuel Vadot - sti-ethclk: this is the phy clock. 28*c66ec88fSEmmanuel Vadot - sti-clkconf: this is an extra sysconfig register, available in new SoCs, 29*c66ec88fSEmmanuel Vadot to program the clk retiming. 30*c66ec88fSEmmanuel Vadot - st,gmac_en: to enable the GMAC, this only is present in some SoCs; e.g. 31*c66ec88fSEmmanuel Vadot STiH407. 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel VadotExample: 34*c66ec88fSEmmanuel Vadot 35*c66ec88fSEmmanuel Vadotethernet0: dwmac@9630000 { 36*c66ec88fSEmmanuel Vadot device_type = "network"; 37*c66ec88fSEmmanuel Vadot compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710"; 38*c66ec88fSEmmanuel Vadot reg = <0x9630000 0x8000>; 39*c66ec88fSEmmanuel Vadot reg-names = "stmmaceth"; 40*c66ec88fSEmmanuel Vadot 41*c66ec88fSEmmanuel Vadot st,syscon = <&syscfg_sbc_reg 0x80>; 42*c66ec88fSEmmanuel Vadot st,gmac_en; 43*c66ec88fSEmmanuel Vadot resets = <&softreset STIH407_ETH1_SOFTRESET>; 44*c66ec88fSEmmanuel Vadot reset-names = "stmmaceth"; 45*c66ec88fSEmmanuel Vadot 46*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>, 47*c66ec88fSEmmanuel Vadot <GIC_SPI 99 IRQ_TYPE_NONE>, 48*c66ec88fSEmmanuel Vadot <GIC_SPI 100 IRQ_TYPE_NONE>; 49*c66ec88fSEmmanuel Vadot interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; 50*c66ec88fSEmmanuel Vadot 51*c66ec88fSEmmanuel Vadot snps,pbl = <32>; 52*c66ec88fSEmmanuel Vadot snps,mixed-burst; 53*c66ec88fSEmmanuel Vadot 54*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 55*c66ec88fSEmmanuel Vadot pinctrl-0 = <&pinctrl_rgmii1>; 56*c66ec88fSEmmanuel Vadot 57*c66ec88fSEmmanuel Vadot clock-names = "stmmaceth", "sti-ethclk"; 58*c66ec88fSEmmanuel Vadot clocks = <&CLK_S_C0_FLEXGEN CLK_EXT2F_A9>, 59*c66ec88fSEmmanuel Vadot <&CLK_S_C0_FLEXGEN CLK_ETH_PHY>; 60*c66ec88fSEmmanuel Vadot}; 61