xref: /freebsd/sys/contrib/device-tree/Bindings/net/rockchip,emac.yaml (revision 5ca8e32633c4ffbbcd6762e5888b6a4ba0708c6c) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/rockchip,emac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip RK3036/RK3066/RK3188 Ethernet Media Access Controller (EMAC)
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    enum:
15      - rockchip,rk3036-emac
16      - rockchip,rk3066-emac
17      - rockchip,rk3188-emac
18
19  reg:
20    maxItems: 1
21
22  interrupts:
23    maxItems: 1
24
25  clocks:
26    minItems: 2
27    items:
28      - description: host clock
29      - description: reference clock
30      - description: mac TX/RX clock
31
32  clock-names:
33    minItems: 2
34    items:
35      - const: hclk
36      - const: macref
37      - const: macclk
38
39  rockchip,grf:
40    $ref: /schemas/types.yaml#/definitions/phandle
41    description:
42      Phandle to the syscon GRF used to control speed and mode for the EMAC.
43
44  phy-supply:
45    description:
46      Phandle to a regulator if the PHY needs one.
47
48  mdio:
49    $ref: mdio.yaml#
50    unevaluatedProperties: false
51
52required:
53  - compatible
54  - reg
55  - interrupts
56  - clocks
57  - clock-names
58  - rockchip,grf
59  - phy
60  - phy-mode
61  - mdio
62
63allOf:
64  - $ref: ethernet-controller.yaml#
65  - if:
66      properties:
67        compatible:
68          contains:
69            const: rockchip,rk3036-emac
70
71    then:
72      properties:
73        clocks:
74          minItems: 3
75
76        clock-names:
77          minItems: 3
78
79    else:
80      properties:
81        clocks:
82          maxItems: 2
83
84        clock-names:
85          maxItems: 2
86
87unevaluatedProperties: false
88
89examples:
90  - |
91    #include <dt-bindings/clock/rk3188-cru-common.h>
92    #include <dt-bindings/interrupt-controller/arm-gic.h>
93
94    ethernet@10204000 {
95      compatible = "rockchip,rk3188-emac";
96      reg = <0xc0fc2000 0x3c>;
97      interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
98      clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
99      clock-names = "hclk", "macref";
100      rockchip,grf = <&grf>;
101      pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
102      pinctrl-names = "default";
103      phy = <&phy0>;
104      phy-mode = "rmii";
105      phy-supply = <&vcc_rmii>;
106
107      mdio {
108        #address-cells = <1>;
109        #size-cells = <0>;
110
111        phy0: ethernet-phy@0 {
112          reg = <1>;
113        };
114      };
115    };
116