xref: /freebsd/sys/contrib/device-tree/Bindings/net/qcom,ipq4019-mdio.yaml (revision 5ca8e32633c4ffbbcd6762e5888b6a4ba0708c6c) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm IPQ40xx MDIO Controller
8
9maintainers:
10  - Robert Marko <robert.marko@sartura.hr>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - qcom,ipq4019-mdio
17          - qcom,ipq5018-mdio
18
19      - items:
20          - enum:
21              - qcom,ipq6018-mdio
22              - qcom,ipq8074-mdio
23          - const: qcom,ipq4019-mdio
24
25  "#address-cells":
26    const: 1
27
28  "#size-cells":
29    const: 0
30
31  reg:
32    minItems: 1
33    maxItems: 2
34    description:
35      the first Address and length of the register set for the MDIO controller.
36      the second Address and length of the register for ethernet LDO, this second
37      address range is only required by the platform IPQ50xx.
38
39  clocks:
40    items:
41      - description: MDIO clock source frequency fixed to 100MHZ
42
43  clock-names:
44    items:
45      - const: gcc_mdio_ahb_clk
46
47required:
48  - compatible
49  - reg
50  - "#address-cells"
51  - "#size-cells"
52
53allOf:
54  - $ref: mdio.yaml#
55
56  - if:
57      properties:
58        compatible:
59          contains:
60            enum:
61              - qcom,ipq5018-mdio
62              - qcom,ipq6018-mdio
63              - qcom,ipq8074-mdio
64    then:
65      required:
66        - clocks
67        - clock-names
68    else:
69      properties:
70        clocks: false
71        clock-names: false
72
73unevaluatedProperties: false
74
75examples:
76  - |
77    mdio@90000 {
78      #address-cells = <1>;
79      #size-cells = <0>;
80      compatible = "qcom,ipq4019-mdio";
81      reg = <0x90000 0x64>;
82
83      ethphy0: ethernet-phy@0 {
84        reg = <0>;
85      };
86
87      ethphy1: ethernet-phy@1 {
88        reg = <1>;
89      };
90
91      ethphy2: ethernet-phy@2 {
92        reg = <2>;
93      };
94
95      ethphy3: ethernet-phy@3 {
96        reg = <3>;
97      };
98
99      ethphy4: ethernet-phy@4 {
100        reg = <4>;
101      };
102    };
103