xref: /freebsd/sys/contrib/device-tree/Bindings/net/qcom,ethqos.yaml (revision 2e3507c25e42292b45a5482e116d278f5515d04d) 
1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/qcom,ethqos.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Ethernet ETHQOS device
8
9maintainers:
10  - Bhupesh Sharma <bhupesh.sharma@linaro.org>
11
12description:
13  dwmmac based Qualcomm ethernet devices which support Gigabit
14  ethernet (version v2.3.0 and onwards).
15
16allOf:
17  - $ref: snps,dwmac.yaml#
18
19properties:
20  compatible:
21    enum:
22      - qcom,qcs404-ethqos
23      - qcom,sc8280xp-ethqos
24      - qcom,sm8150-ethqos
25
26  reg:
27    maxItems: 2
28
29  reg-names:
30    items:
31      - const: stmmaceth
32      - const: rgmii
33
34  interrupts:
35    items:
36      - description: Combined signal for various interrupt events
37      - description: The interrupt that occurs when Rx exits the LPI state
38
39  interrupt-names:
40    items:
41      - const: macirq
42      - const: eth_lpi
43
44  clocks:
45    maxItems: 4
46
47  clock-names:
48    items:
49      - const: stmmaceth
50      - const: pclk
51      - const: ptp_ref
52      - const: rgmii
53
54  iommus:
55    maxItems: 1
56
57required:
58  - compatible
59  - clocks
60  - clock-names
61  - reg-names
62
63unevaluatedProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/interrupt-controller/arm-gic.h>
68    #include <dt-bindings/clock/qcom,gcc-qcs404.h>
69    #include <dt-bindings/gpio/gpio.h>
70
71    ethernet: ethernet@7a80000 {
72      compatible = "qcom,qcs404-ethqos";
73      reg = <0x07a80000 0x10000>,
74            <0x07a96000 0x100>;
75      reg-names = "stmmaceth", "rgmii";
76      clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
77      clocks = <&gcc GCC_ETH_AXI_CLK>,
78               <&gcc GCC_ETH_SLAVE_AHB_CLK>,
79               <&gcc GCC_ETH_PTP_CLK>,
80               <&gcc GCC_ETH_RGMII_CLK>;
81      interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
82                   <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
83      interrupt-names = "macirq", "eth_lpi";
84
85      rx-fifo-depth = <4096>;
86      tx-fifo-depth = <4096>;
87
88      snps,tso;
89      snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
90      snps,reset-active-low;
91      snps,reset-delays-us = <0 10000 10000>;
92
93      pinctrl-names = "default";
94      pinctrl-0 = <&ethernet_defaults>;
95
96      phy-handle = <&phy1>;
97      phy-mode = "rgmii";
98      mdio {
99        #address-cells = <0x1>;
100        #size-cells = <0x0>;
101
102        compatible = "snps,dwmac-mdio";
103        phy1: phy@4 {
104          compatible = "ethernet-phy-ieee802.3-c22";
105          device_type = "ethernet-phy";
106          reg = <0x4>;
107
108          #phy-cells = <0>;
109        };
110      };
111    };
112