xref: /freebsd/sys/contrib/device-tree/Bindings/net/qca,ar71xx.yaml (revision 924226fba12cc9a228c73b956e1b7fa24c60b055) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/qca,ar71xx.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: QCA AR71XX MAC
8
9allOf:
10  - $ref: ethernet-controller.yaml#
11
12maintainers:
13  - Oleksij Rempel <o.rempel@pengutronix.de>
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - qca,ar7100-eth   # Atheros AR7100
21              - qca,ar7240-eth   # Atheros AR7240
22              - qca,ar7241-eth   # Atheros AR7241
23              - qca,ar7242-eth   # Atheros AR7242
24              - qca,ar9130-eth   # Atheros AR9130
25              - qca,ar9330-eth   # Atheros AR9330
26              - qca,ar9340-eth   # Atheros AR9340
27              - qca,qca9530-eth  # Qualcomm Atheros QCA9530
28              - qca,qca9550-eth  # Qualcomm Atheros QCA9550
29              - qca,qca9560-eth  # Qualcomm Atheros QCA9560
30
31  reg:
32    maxItems: 1
33
34  interrupts:
35    maxItems: 1
36
37  '#address-cells':
38    description: number of address cells for the MDIO bus
39    const: 1
40
41  '#size-cells':
42    description: number of size cells on the MDIO bus
43    const: 0
44
45  clocks:
46    items:
47      - description: MAC main clock
48      - description: MDIO clock
49
50  clock-names:
51    items:
52      - const: eth
53      - const: mdio
54
55  resets:
56    items:
57      - description: MAC reset
58      - description: MDIO reset
59
60  reset-names:
61    items:
62      - const: mac
63      - const: mdio
64
65required:
66  - compatible
67  - reg
68  - interrupts
69  - phy-mode
70  - clocks
71  - clock-names
72  - resets
73  - reset-names
74
75unevaluatedProperties: false
76
77examples:
78  # Lager board
79  - |
80    eth0: ethernet@19000000 {
81        compatible = "qca,ar9330-eth";
82        reg = <0x19000000 0x200>;
83        interrupts = <4>;
84        resets = <&rst 9>, <&rst 22>;
85        reset-names = "mac", "mdio";
86        clocks = <&pll 1>, <&pll 2>;
87        clock-names = "eth", "mdio";
88        qca,ethcfg = <&ethcfg>;
89        phy-mode = "mii";
90        phy-handle = <&phy_port4>;
91    };
92
93    eth1: ethernet@1a000000 {
94        compatible = "qca,ar9330-eth";
95        reg = <0x1a000000 0x200>;
96        interrupts = <5>;
97        resets = <&rst 13>, <&rst 23>;
98        reset-names = "mac", "mdio";
99        clocks = <&pll 1>, <&pll 2>;
100        clock-names = "eth", "mdio";
101
102        phy-mode = "gmii";
103
104        status = "disabled";
105
106        fixed-link {
107            speed = <1000>;
108            full-duplex;
109        };
110
111        mdio {
112            #address-cells = <1>;
113            #size-cells = <0>;
114
115            switch10: switch@10 {
116                #address-cells = <1>;
117                #size-cells = <0>;
118
119                compatible = "qca,ar9331-switch";
120                reg = <0x10>;
121                resets = <&rst 8>;
122                reset-names = "switch";
123
124                interrupt-parent = <&miscintc>;
125                interrupts = <12>;
126
127                interrupt-controller;
128                #interrupt-cells = <1>;
129
130                ports {
131                    #address-cells = <1>;
132                    #size-cells = <0>;
133
134                    switch_port0: port@0 {
135                        reg = <0x0>;
136                        label = "cpu";
137                        ethernet = <&eth1>;
138
139                        phy-mode = "gmii";
140
141                        fixed-link {
142                            speed = <1000>;
143                            full-duplex;
144                        };
145                    };
146
147                    switch_port1: port@1 {
148                        reg = <0x1>;
149                        phy-handle = <&phy_port0>;
150                        phy-mode = "internal";
151
152                        status = "disabled";
153                    };
154
155                    switch_port2: port@2 {
156                        reg = <0x2>;
157                        phy-handle = <&phy_port1>;
158                        phy-mode = "internal";
159
160                        status = "disabled";
161                    };
162
163                    switch_port3: port@3 {
164                        reg = <0x3>;
165                        phy-handle = <&phy_port2>;
166                        phy-mode = "internal";
167
168                        status = "disabled";
169                    };
170
171                    switch_port4: port@4 {
172                        reg = <0x4>;
173                        phy-handle = <&phy_port3>;
174                        phy-mode = "internal";
175
176                        status = "disabled";
177                    };
178                };
179
180                mdio {
181                    #address-cells = <1>;
182                    #size-cells = <0>;
183
184                    interrupt-parent = <&switch10>;
185
186                    phy_port0: phy@0 {
187                        reg = <0x0>;
188                        interrupts = <0>;
189                        status = "disabled";
190                    };
191
192                    phy_port1: phy@1 {
193                        reg = <0x1>;
194                        interrupts = <0>;
195                        status = "disabled";
196                    };
197
198                    phy_port2: phy@2 {
199                        reg = <0x2>;
200                        interrupts = <0>;
201                        status = "disabled";
202                    };
203
204                    phy_port3: phy@3 {
205                        reg = <0x3>;
206                        interrupts = <0>;
207                        status = "disabled";
208                    };
209
210                    phy_port4: phy@4 {
211                        reg = <0x4>;
212                        interrupts = <0>;
213                        status = "disabled";
214                    };
215                };
216            };
217        };
218    };
219